IDT49C460 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT49C460 Datasheet PDF : 32 Pages
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IDT49C460/A/B/C/D/E
32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SET-UP AND HOLD TIMES AND MINIMUM PULSE WIDTHS
Of
Set-up/Hold Time
With Respect To
Min./Max.
CBIN
LEIN.
DATAIN
CODE ID1,0 = 00, 11
CODE ID1,0 = 10
LEOUT/GEN
CORRECT
Valid
2
3
5
14*
3
3
Valid
11
6
6
5
6
CBIN Set-up to LEIN = Low
CBIN Hold to LEIN = Low
LEIN width
*LEIN = High to LEOUT/GEN = Low*
DATA Set-up to LEIN = Low
DATA Hold to LEIN = Low
CBIN Set-up to LEOUT/GEN = Low
CBIN Set-up to LEOUT/GEN = Low
DATA Set-up to LEOUT/GEN = Low
LEOUT/GENERATE Width
CORRECT Set-up to
LEOUT/GEN = Low
Min.
Min.
Min.
Min.
Min.
Min.
Min.
Min.
Min.
Min.
Min.
NOTES:
2584 drw 11
1. BOLD indicates critical parameters.
2. This is "E" version timing spec. Check appropriate table for other speed versions.
* Enable to enable timing requirement to ensure that the last DATA word applied to "DATAIN" is made available as DATAOUT"; assumes that "DATAIN"
is valid at least 4ns before "LEIN" goes high.
INPUT/OUTPUT INTERFACE CIRCUIT
INPUTS
ESD
PROTECTION
IIH
IIL
2584 drw 12
Figure 5. Input Structure (All Inputs)
VCC
IOH
OUTPUTS
IOL
2584 drw 13
Figure 6. Out put Structure
11.6
31
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