IMX51A 데이터 시트보기 (PDF) - Freescale Semiconductor

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IMX51A

i.MX51A Automotive and Infotainment Applications Processors

Freescale Semiconductor 

IOMUX Configuration for Boot Media

3.1 NAND

The NAND Flash Controller (NFC) signals are not configured in the IOMUX. The NFC interface uses

dedicated contacts on the IC.

3.2 SD/MMC IOMUX Pin Configuration

Table 5 shows the SD/MMC IOMUX pin configuration.

Table 5. SD/MMC IOMUX Pin Configuration

Signal

eSDHC1

eSDHC2

eSDHC3

eSDHC4

CLK

SD1_CLK.alt0 SD2_CLK.alt0 NANDF_RDY_INT.alt5 NANDF_CS2.alt5

CMD

SD1_CMD.alt0 SD2_CMD.alt0 NANDF_CS7.alt5 NANDF_RB1.alt5

DAT0

DAT1

SD1_DATA0.alt0 SD2_DATA0.alt0

N/A1

N/A

NANDF_WE_B.alt2

N/A

NANDF_CS3.alt5

N/A

DAT2

N/A

N/A

N/A

N/A

CD/DAT3 SD1_DATA3.alt0 SD2_DATA3.alt0 NANDF_RB0.alt5 NANDF_CS6.alt5

DAT4

N/A

N/A

N/A

N/A

DAT5

N/A

N/A

N/A

N/A

DAT6

N/A

N/A

N/A

N/A

DAT7

N/A

N/A

N/A

N/A

1 N/A in the ROM code indicates the pins are not available.

Only DAT0 is available when the SD/MMC is used for boot. The remaining lines (DAT1–DAT7) are not

available.

3.3 I2C IOMUX Pin Configuration

The contacts assigned to the signals used by the three I2C modules is shown in Table 6.

Table 6. I2C IOMUX Pin Configuration

Signal

HSI2C

I2C1

I2C2

SDA I2C1_DAT.alt0 I2C1_DAT.alt0 GPIO1_3.alt2

SCL I2C1_CLK.alt0 I2C1_CLK.alt0 GPIO1_2.alt2

i.MX51A Automotive and Infotainment Applications Processors, Rev. 2

14

Freescale Semiconductor

Preliminary—Subject to Change Without Notice

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