iP2003
All specifications @25°C (unless otherwise specified)
Absolute Maximum Ratings:
Parameter
Symbol Min
VIN to PGND
VDD to PGND
VIN
-
VDD
-
PWM to PGND
PWM
-0.3
Enable to PGND
ENABLE -0.3
Output RMS Current
IOUT
-
Block Temperature
TBLK
-40
Typ Max Units
Conditions
-
16
V
-
6.0
V
- VDD +0.3 V Not to exceed 6.0V
- VDD +0.3 V Not to exceed 6.0V
-
40
A Measured at VSW
-
125
°C
Capable of start up over full
temperature range
Recommended Operating Conditions:
Parameter
Symbol Min Typ Max Units
Supply Voltage
VDD
4.6
5.0
5.5
V
Input Voltage
VIN
3.0
-
13.2
V
Output Voltage
VOUT
0.8
-
3.3
V
Output Current
IOUT
-
-
40
A
Operating Frequency
fsw
300
-
1000 kHz
Operating Duty Cycle
D
-
-
85
%
Conditions
Electrical Specifications @ VDD = 5V (unless otherwise specified):
Parameter
Symbol Min Typ Max Units
Block Power Loss c
PLOSS
-
9.4 11.7
W
Turn On Delay d
Turn Off Delay d
td(on)
td(off)
-
63
-
ns
-
26
-
VIN Quiescent Current
IQ-VIN
-
-
1.0
mA
VDD Quiescent Current
IQ-VDD
-
10
-
µA
Under-Voltage Lockout
UVLO
Start Threshold
VSTART
4.2
4.4
4.5
V
Hysteresis
VHvs-UVLO
-
150
-
mV
Enable
ENABLE
Input Voltage High
VIH
2.0
-
-
V
Input Voltage Low
VIL
-
-
0.8
Power Ready
PRDY
Logic Level High
VOH
4.5
4.6
-
V
Logic Level Low
VOL
-
0.1
0.2
PWM Input
PWM
Logic Level High
VOH
2.0
-
-
V
Logic Level Low
VOL
-
-
0.8
Conditions
VIN=12V, VOUT=1.3V
IOUT=40A, fSW=1MHz
L = 0.3µH
Enable = 0V, VIN=12V
Enable = 0V, VDD=5V
VDD=4.6V, ILoad=10mA
VDD <UVLO Threshold, ILoad = 1mA
Measurement were made using four 10uF (TDK C3225X5R1C106KT or equiv.) capacitors across the input (see
Fig. 8).
Not associated with the rise and fall times. Does not affect Power Loss (see Fig. 9).
2
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