IR3092
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over: 7.3V VCC 21V, 4V VCCL 14V,
4V VCCHX 28V, CGATEHX =3.3nF, CGATELX =6.8nF, 0oC TJ 125 oC
PARAMETER
TEST CONDITION
MIN TYP MAX UNIT
VDAC Reference
System Set-Point Accuracy
-0.3V 92616- 9 &RQQHFW )% WR
0.5
%
EAOUT, Measure V(EAOUT) –
V(VOSNS-) deviation from Table 1.
Applies to all VID codes.
Source Current
Sink Current
VID Input Threshold, INTEL
RROSC = 42k 9'$& 2&6(7
RROSC = 42k 9'$& 2&6(7
VID_SEL=0, Referenced to VOSNS-
56
62
71
PA
50
58
67
PA
0.4
0.6
0.8
V
VID Input Threshold, AMD
VID_SEL=Float, Referenced to
VOSNS-
1.3
1.5
1.7
V
VID_SEL OPTERON
Threshold
1.0
1.2
1.4
V
VID_SEL ATHLON Threshold
3.0
3.4
3.8
V
VID_SEL Float Voltage
Tracks ATHLON threshold
2.1
2.6
3.2
V
VID_SEL Pull-up Resistance
VID_SEL Pull-down
Resistance
V(VID_SEL)<2.1V
V(VID_SEL)>3.2V
30
60
100
k
60
190 375
k
VID Pull-up Current
VID Float Voltage
VID0-5 = 1V
Referenced to LGND
9
15
27
PA
4.5
4.9
5.2
V
VID = 11111 Fault Blanking
Error Amplifier
Delay to PWRGD assertion
0.5
1.7
4.1
Ps
Input Offset Voltage
Connect FB to EAOUT, Measure
V(EAOUT)-V(VDAC). From Table 1.
Applies to all VID codes and -0.3V
VOSNS- 9 1RWH
-5
-1
3
mV
FB Bias Current
DC Gain
Gain-Bandwidth Product
Slew Rate
Source Current
Sink Current
Max Voltage
Min Voltage
VDRP Buffer Amplifier
Positioning Offset Voltage
Output Voltage Range
Source Current
Sink Current
RROSC = 42k
Note 1
Note 1
Note 1, 50mV FB signal
V(VDRP) – V(VDAC) with
CSINMX=CSINPX=0, Note 1.
28 30.5 33
PA
90
100 105
dB
4
7
MHz
1.25
V/Ps
280 380 500
PA
.75
1.0
1.5
mA
4.5
4.9
5.3
V
90
150 mV
-125
0
125 mV
0.2
3.75
V
5
10
20
mA
200 280 400
PA
Page 4 of 37
06/25/04