IS24C128A 데이터 시트보기 (PDF) - Integrated Silicon Solution

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IS24C128A

128K-bit/ 256K-bit 2-WIRE SERIAL CMOS EEPROM

Integrated Silicon Solution 

IS24C128A

IS24C256A

PIN CONFIGURATION

8-Pin DIP and SOIC

A0 1

A1 2

A2 3

GND 4

8 VCC

7 WP

6 SCL

5 SDA

ISSI ®

PIN DESCRIPTIONS

A0-A2

SDA

SCL

WP

Vcc

NC

GND

Address Inputs

Serial Address/Data I/O

Serial Clock Input

Write Protect Input

Power Supply

No Connect

Ground

SCL

This input clock pin is used to synchronize the data transfer

to and from the device.

SDA

The SDA is a Bi-directional pin used to transfer addresses

and data into and out of the device. The SDA pin is an open

drain output and can be wire Or'ed with other open drain or

open collector outputs. The SDA bus requires a pullup

resistor to Vcc.

A0, A1, A2

The A0, A1, and A2 are the device address inputs that are

hardwired or left not connected for hardware compatibility

with the IS24C32A/64A. When pins are hardwired, as many

as eight 256K devices may be addressed on a single bus

system. When the pins are not hardwired, the default values

of A0, A1, and A2 are zero.

WP

WP is the Write Protect pin. If the WP pin is tied to Vcc

the entire array becomes Write Protected (Read only).

When WP is tied to GND or left floating, normal read/write

operations are allowed to the device.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

3

ADVANCEDINFORMATION Rev. 00B

06/27/06

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