LX64EV-5F100I 데이터 시트보기 (PDF) - Lattice Semiconductor

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LX64EV-5F100I

High Performance Interfacing and Switching

Lattice Semiconductor 

Lattice Semiconductor

Figure 8. ispGDX2-64 CLOCK Network

sysIO Interface

GCLK/CE0

+

VREF0

-

CLK_OUT0

GCLK/CE1

+

VREF1

-

CLK_OUT2

GCLK/CE2

+

VREF2

-

sysCLOCK

CLK0

K(0)

PLL

(0)

CLK2

K(2)

PLL

(2)

GCLK/CE3

+

VREF3

-

Figure 9. ispGDX2-128 CLOCK Network

sysIO Interface

GCLK/CE0

+

VREF0

-

CLK_OUT0

GCLK/CE1

+

VREF1

-

CLK_OUT2

GCLK/CE2

+

VREF2

-

GCLK/CE3

+

VREF3

-

sysCLOCK

CLK0

K(0)

PLL

(0)

CLK2

K(2)

PLL

(2)

12

ispGDX2 Family Data Sheet

Clock Net

MRB

Clock Net

Reg/

Latch

Clock Net

Reg/

Latch

Clock Net

Reg/

Latch

Clock Net

Reg/

Latch

Clock Net

MRB

Clock Net

Reg/

Latch

Clock Net

Reg/

Latch

Clock Net

Reg/

Latch

Clock Net

Reg/

Latch

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