L6393 데이터 시트보기 (PDF) - STMicroelectronics

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L6393

Half-bridge gate driver

STMicroelectronics 

L6393

3

Truth table

Truth table

Note:

Note:

Table 3.

Truth table

Inputs

SD

PHASE

L

X

H

L

H

L

H

H

H

H

BRAKE

X

L

H

L

H

Outputs

LVG

HVG

L

L

H

L

H

L

H

L

L

H

X: don’t care

In the L6393 IC the two input signals PHASE and BRAKE are fed into an AND logic port and

the resulting signal is in phase with the high side output HVG and in opposition of phase with

the low side output LVG. This means that if BRAKE is kept to high level, the PHASE signal

drives the half-bridge in phase with the HVG output and in opposition of phase with the LVG

output. If BRAKE is set to low level the low side output LVG is always ON and the high side

output HVG is always OFF, whatever the PHASE signal. This kind of logic interface provides

the possibility to control the power stages using the PHASE signal to select the current

direction in the bridge and the BRAKE signal to perform current slow decay on the low sides.

From the point of view of the logic operations the two signals PHASE and BRAKE are

completely equivalent, that means the two signals can be exchanged without any change in

the behavior on the resulting output signals (see the Figure 1 on page 3).

The dead time between the turn OFF of one power switch and the turn ON of the other

power switch is defined by the resistor connected between DT pin and the ground.

Doc ID 14497 Rev 4

5/19

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