LH5P860 데이터 시트보기 (PDF) - Sharp Electronics
부품명
상세내역
제조사
LH5P860 Datasheet PDF : 13 Pages
| |||
LH5P860
CMOS 512K (64K × 8) Pseudo-Static RAM
FEATURES
• 65,536 × 8 bit organization
• Access time: 80 ns (MAX.)
• Cycle time: 140 ns (MIN.)
• Single +5 V power supply
• Pin compatible with 1M standard SRAM
• Power consumption (MAX.):
Operating: 440 mW
Self refresh (TTL level): 5.5 mW
Self refresh (CMOS level): 2.75 mW
• TTL compatible I/O
• 512 refresh cycles/8 ms (MAX.)
• Available for auto-refresh and self-refresh
modes
• Packages:
32-pin, 600-mil DIP
32-pin, 525-mil SOP
DESCRIPTION
The LH5P860 is a 512K-bit Pseudo-Static RAM or-
ganized as 65,536 × 8 bits. It is fabricated using sili-
con-gate CMOS process technology. With its built-in
oscillator, it is easy to refresh memories without an
external clock.
PIN CONNECTIONS
32-PIN DIP
32-PIN SOP
TOP VIEW
RFSH 1
NC 2
A14
3
A12
4
A7
5
A6
6
A5
7
A4
8
A3
9
A2 10
A1 11
A0 12
I/O0 13
I/O1 14
I/O2 15
GND 16
32 VCC
31 A15
30 CE2
29 R/W
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE1
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
5P860-1
Figure 1. Pin Connections for DIP and
SOP Packages
1
Share Link: 