LH5PV8512N-12 데이터 시트보기 (PDF) - Sharp Electronics
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LH5PV8512N-12 Datasheet PDF : 12 Pages
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CMOS 4M (512K × 8) Pseudo-Static RAM
LH5PV8512
AC ELECTRICAL CHARACTERISTICS 1, 2, 3, 4, 5 (TA = 0 to +70°C, VCC = 3.0 V ± 0.15 V)
PARAMETER
SYMBOL MIN. MAX. UNIT
NOTES
Random read, write cycle time
Random modify write cycle time
CE pulse width
CE precharge time
Address setup time
Address hold time
Read command setup time
Read command hold time
CE access time
OE access time
CE to output in Low-Z
OE to output in Low-Z
Write disable to output in Low-Z
Chip disable to output in High-Z
Output disable to output in High-Z
WE to output in High-Z
OE set up time from CE
OE hold time from CE
OE setup time from chip disable
Write command pulse width
Write command setup time
Write command hold time
Data setup time from write disable
Data setup time from chip disable
Data hold time from write disable
Data hold time from chip disable
Transition time (rise and fall)
Refresh time interval (2,048 cycle)
Auto refresh cycle time
Refresh delay time from CE
Refresh pulse width (Auto refresh)
Refresh precharge time (Auto refresh)
Refresh pulse width (Self refresh)
CE delay time from refresh precharge
(Self refresh)
tRC
tRMW
tCE
tP
tAS
tAH
tRCS
tRCH
tCEA
tOEA
tCLZ
tOLZ
tWLZ
tCHZ
tOHZ
tWHZ
tOES
tOEH
tOCD
tWP
tWCS
tWCH
tDSW
tDSC
tDHW
tDHC
tT
tREF
tFC
tRFD
tFAP
tFP
tFAS
tFRS
190
ns
250
ns
120 10,000 ns
70
ns
0
ns
6
30
ns
6
0
ns
0
ns
120
ns
7
60
ns
7
20
ns
8
0
ns
8
5
ns
8
0
30
ns
8
30
ns
8
30
ns
8
0
ns
15
ns
0
ns
35
ns
35 10,000 ns
120 10,000 ns
30
ns
9
30
ns
9
0
ns
9
0
ns
9
2
50
ns
32
ms
10, 13, 14
190
ns
70
ns
80 8,000 ns
11, 15
40
ns
8
ms 11, 12, 13, 14, 15
600
ns
DATA RETENTION CHARACTERISTICS 12, 13, 14, 15, 16, 17, 18, 19, 20 (TA = 0 to +70°C)
PARAMETER
SYMBOL MIN. MAX. UNIT
NOTES
Data retention voltage
VR
2.2
3.15
V
Data retention current
(VCC = 3.15 V, CE = VCC - 0.2 V, OE/RFSH = 0.2 V)
ICCDR
70
µA
Refresh setup time
tFS
0
ns
Recover time from data retention mode
tFR
5
ms
5
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