LPC2114 데이터 시트보기 (PDF) - NXP Semiconductors.

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LPC2114

Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC

NXP Semiconductors. 

NXP Semiconductors

LPC2114/2124

Single-chip 16/32-bit microcontrollers

the capability to both receive and send information (such as memory). Transmitters and/or

receivers can operate in either master or slave mode, depending on whether the chip has

to initiate a data transfer or is only addressed. The I2C-bus is a multi-master bus; it can be

controlled by more than one bus master connected to it.

The I2C-bus implemented in LPC2114/2124 supports a bit rate up to 400 kbit/s (Fast

I2C-bus).

6.10.1 Features

• Standard I2C-bus compliant interface.

• Easy to configure as Master, Slave, or Master/Slave.

• Programmable clocks allow versatile rate control.

• Bidirectional data transfer between masters and slaves.

• Multi-master bus (no central master).

• Arbitration between simultaneously transmitting masters without corruption of serial

data on the bus.

• Serial clock synchronization allows devices with different bit rates to communicate via

one serial bus.

• Serial clock synchronization can be used as a handshake mechanism to suspend and

resume serial transfer.

• The I2C-bus may be used for test and diagnostic purposes.

6.11 SPI serial I/O controller

The LPC2114/2124 each contain two SPIs. The SPI is a full duplex serial interface,

designed to be able to handle multiple masters and slaves connected to a given bus. Only

a single master and a single slave can communicate on the interface during a given data

transfer. During a data transfer the master always sends a byte of data to the slave, and

the slave always sends a byte of data to the master.

6.11.1 Features

• Compliant with Serial Peripheral Interface (SPI) specification.

• Synchronous, Serial, Full Duplex communication.

• Combined SPI master and slave.

• Maximum data bit rate of 1⁄8 of the input clock rate.

6.11.2 Features available in LPC2114/2124/01 only

• Eight to 16 bits per frame.

• When the SPI interface is used in Master mode, the SSELn pin is not needed (can be

used for a different function).

LPC2114_2124

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 7 — 10 June 2011

© NXP B.V. 2011. All rights reserved.

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