LPC2292 데이터 시트보기 (PDF) - NXP Semiconductors.
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LPC2292
NXP Semiconductors.
LPC2292 Datasheet PDF : 54 Pages
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NXP Semiconductors
LPC2292/LPC2294
16/32-bit ARM microcontrollers with external memory interface
Table 4. Pin description …continued
Symbol
Pin (LQFP) Pin
(TFBGA)[1]
P1[25]/EXTIN0 60[7]
K8[7]
Type
I
P1[26]/RTCK 52[7]
N6[7]
I/O
P1[27]/TDO
144[7]
B2[7]
O
P1[28]/TDI
140[7]
A3[7]
I
P1[29]/TCK
126[7]
A7[7]
I
P1[30]/TMS
113[7]
D10[7]
I
P1[31]/TRST 43[7]
M4[7]
I
P2[0] to P2[31]
I/O
P2[0]/D0
P2[1]/D1
P2[2]/D2
P2[3]/D3
P2[4]/D4
P2[5]/D5
P2[6]/D6
P2[7]/D7
P2[8]/D8
P2[9]/D9
P2[10]/D10
P2[11]/D11
P2[12]/D12
P2[13]/D13
P2[14]/D14
P2[15]/D15
P2[16]/D16
P2[17]/D17
P2[18]/D18
P2[19]/D19
P2[20]/D20
P2[21]/D21
P2[22]/D22
P2[23]/D23
98[7]
105[7]
106[7]
108[7]
109[7]
114[7]
115[7]
116[7]
117[7]
118[7]
120[7]
124[7]
125[7]
127[7]
129[7]
130[7]
131[7]
132[7]
133[7]
134[7]
136[7]
137[7]
1[7]
10[7]
E12[7]
I/O
C12[7]
I/O
C11[7]
I/O
B12[7]
I/O
A13[7]
I/O
C10[7]
I/O
B10[7]
I/O
A10[7]
I/O
D9[7]
I/O
C9[7]
I/O
A9[7]
I/O
A8[7]
I/O
B7[7]
I/O
C7[7]
I/O
A6[7]
I/O
B6[7]
I/O
C6[7]
I/O
D6[7]
I/O
A5[7]
I/O
B5[7]
I/O
D5[7]
I/O
A4[7]
I/O
A1[7]
I/O
E3[7]
I/O
Description
EXTIN0 — External Trigger Input. Standard I/O with internal
pull-up.
RTCK — Returned Test Clock output. Extra signal added to
the JTAG port. Assists debugger synchronization when
processor frequency varies. Bidirectional pin with internal
pull-up.
Note: LOW on this pin while RESET is LOW, enables pins
P1[31:26] to operate as Debug port after reset.
TDO — Test Data out for JTAG interface.
TDI — Test Data in for JTAG interface.
TCK — Test Clock for JTAG interface. This clock must be
slower than 1⁄6 of the CPU clock (CCLK) for the JTAG interface
to operate.
TMS — Test Mode Select for JTAG interface.
TRST — Test Reset for JTAG interface.
Port 2 — Port 2 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 2 pins
depends upon the pin function selected via the Pin Connect
Block.
D0 — External memory data line 0.
D1 — External memory data line 1.
D2 — External memory data line 2.
D3 — External memory data line 3.
D4 — External memory data line 4.
D5 — External memory data line 5.
D6 — External memory data line 6.
D7 — External memory data line 7.
D8 — External memory data line 8.
D9 — External memory data line 9.
D10 — External memory data line 10.
D11 — External memory data line 11.
D12 — External memory data line 12.
D13 — External memory data line 13.
D14 — External memory data line 14.
D15 — External memory data line 15.
D16 — External memory data line 16.
D17 — External memory data line 17.
D18 — External memory data line 18.
D19 — External memory data line 19.
D20 — External memory data line 20.
D21 — External memory data line 21.
D22 — External memory data line 22.
D23 — External memory data line 23.
LPC2292_2294_6
Product data sheet
Rev. 06 — 10 December 2007
© NXP B.V. 2007. All rights reserved.
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