LBGA256 데이터 시트보기 (PDF) - NXP Semiconductors.

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LBGA256

32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD, and external memory controller

NXP Semiconductors. 

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

Table 3. Pin description …continued

LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.

Symbol

Description

P2_5

P2_6

P2_7

K14 J12 D10 131 91

K16 J14 G9 137 95

H14 G12 C10 138 96

[3] N; PU - R — Function reserved.

I CTIN_2 — SCT input 2. Capture input 2 of timer 0.

I USB1_VBUS — Monitors the presence of USB1 bus

power.

Note: This signal must be HIGH for USB reset to occur.

I ADCTRIG1 — ADC trigger input 1.

I/O GPIO5[5] — General purpose digital input/output pin.

- R — Function reserved.

O T3_MAT2 — Match output 2 of timer 3.

O USB0_IND0 — USB0 port indicator LED control

output 0.

[2] N; PU - R — Function reserved.

I/O U0_DIR — RS-485/EIA-485 output enable/direction

control for USART0.

I/O EMC_A10 — External memory address line 10.

O USB0_IND0 — USB0 port indicator LED control

output 0.

I/O GPIO5[6] — General purpose digital input/output pin.

I CTIN_7 — SCT input 7.

I T3_CAP3 — Capture input 3 of timer 3.

- R — Function reserved.

[2] N; PU I/O GPIO0[7] — General purpose digital input/output pin.

ISP entry pin. If this pin is pulled LOW at reset, the part

enters ISP mode using USART0.

O CTOUT_1 — SCT output 1. Match output 3 of timer 3.

I/O U3_UCLK — Serial clock input/output for USART3 in

synchronous mode.

I/O EMC_A9 — External memory address line 9.

- R — Function reserved.

- R — Function reserved.

O T3_MAT3 — Match output 3 of timer 3.

- R — Function reserved.

LPC1850_30_20_10

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 6.1 — 7 February 2013

© NXP B.V. 2013. All rights reserved.

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