LT1943 데이터 시트보기 (PDF) - Linear Technology

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LT1943

High Current Quad Output Regulator for TFT LCD Panels

Linear Technology 

U

OPERATIO

should be 5Ω of resistance between the VON pin and its

connection to the load, as shown on Figure 3. The resis-

tance will damp resonant tank circuit created by the output

short. As the transient on the VON pin during a short-circuit

condition will be highly dependent on the layout and the

type of short, be sure to test the short condition and

examine the voltage at the VON pin to check that it does not

swing below ground.

VON

R1

5Ω

TO LOAD

C1

0.47µF

R1 IS ONLY NECESSARY

IF LOAD MAY HAVE TRANSIENT

SHORT CONDITION. OTHERWISE,

CONNECT VON PIN DIRECTLY TO LOAD

1943 F03

Figure 3. Transient Short Protection for VON Pin

Printed Circuit Board Layout

For proper operation and minimum EMI, care must be

taken during printed circuit board (PCB) layout. Figure 4

shows the high-current paths in the step down regulator

circuit. Note that in the step-down regulators, large,

switched currents flow in the power switch, the catch

diode, and the input capacitor. In the step-up regulators,

large, switched currents flow through the power switch,

the switching diode, and the output capacitor. In SEPIC

LT1943

and inverting regulators, the switched currents flow through

the power switch, the switching diode, and the tank

capacitor. The loop formed by the components in the

switched current path should be as small as possible.

Place these components, along with the inductor and

output capacitor, on the same side of the circuit board, and

connect them on that layer. Place a local, unbroken ground

plane below these components, and tie this ground plane

to system ground at one location, ideally at the ground

terminal of the output capacitor C2. Additionally, keep the

SW and BOOST nodes as small as possible.

Thermal Considerations

The PCB must provide heat sinking to keep the LT1943

cool. The exposed pad on the bottom of the package must

be soldered to a ground plane. This ground should be tied

to other copper layers below with thermal vias; these

layers will spread the heat dissipated by the LT1943. Place

additional vias near the catch diodes. Adding more copper

to the top and bottom layers and tying this copper to the

internal planes with vias can reduce thermal resistance

further. With these steps, the thermal resistance from die

(or junction) to ambient can be reduced to θJA = 25°C or

less. With 100LFPM airflow, this resistance can fall by

another 25%. Further increases in airflow will lead to lower

thermal resistance.

VIN SW

GND

VIN SW

GND

(a)

IC1

VSW

VIN SW

C1

GND

L1

D1

(b)

C2

1943 F04

(c)

Figure 4. Subtracting the Current when the Switch is ON (a) From the Current when the Switch is OFF (b) Reveals the Path of

the High Frequency Switching Current (c) Keep this Loop Small. The Voltage on the SW and BOOST Nodes will also be

Switched; Keep these Nodes as Small as Possible. Finally, Make Sure the Circuit is Shielded with a Local Ground Plane

1943fa

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