LT1956 데이터 시트보기 (PDF) - Linear Technology
부품명
상세내역
제조사
LT1956 Datasheet PDF : 28 Pages
| |||
LT1956/LT1956-5
APPLICATIO S I FOR ATIO
Note: Some of the internal power dissipation in the IC, due
to BOOST pin voltage, can be transferred outside of the IC
to reduce junction temperature by increasing the voltage
drop in the path of the boost diode D2 (see Figure 9). This
reduction of junction temperature inside the IC will allow
higher ambient temperature operation for a given set of
conditions. BOOST pin circuitry dissipates power given by:
( ) PDISS
(BOOST Pin) =
VOUT
•
ISW / 36
VIN
• VC2
Typically, VC2 (the boost voltage across the capacitor C2)
equals VOUT. This is because diodes D1 and D2 can be
considered almost equal, where:
VC2 = VOUT – VF(D2) – [–VF(D1)] = VOUT.
Hence, the equation for boost circuitry power dissipation
given in the previous Thermal Calculations section, is
stated as:
( ) PDISS(BOOST)
=
VOUT
•
ISW / 36
VIN
• VOUT
Here it can be seen that boost power dissipation increases
as the square of VOUT. It is possible, however, to reduce
VC2 below VOUT to save power dissipation by increasing
the voltage drop in the path of D2. Care should be taken
that VC2 does not fall below the minimum 3.3V boost
voltage required for full saturation of the internal power
switch. For output voltages of 5V, VC2 is approximately 5V.
During switch turn on, VC2 will fall as the boost capacitor
C2 is discharged by the BOOST pin. In the previous BOOST
Pin section, the value of C2 was designed for a 0.7V droop
in VC2 (= VDROOP). Hence, an output voltage as low as 4V
would still allow the minimum 3.3V for the boost function
using the C2 capacitor calculated.
If a target output voltage of 12V is required, however, an
excess of 8V is placed across the boost capacitor which is
not required for the boost function but still dissipates
additional power.
What is required is a voltage drop in the path of D2 to
achieve minimal power dissipation while still maintaining
minimum boost voltage across C2.
A zener, D4, placed in series with D2 (see Figure 9), drops
voltage to C2.
Example:
The BOOST pin power dissipation for a 20V input to 12V
output conversion at 1A is given by:
PBOOST
=
12 • (1/ 36) •12
20
=
0.2W
If a 7V zener is placed in series with D2, then power
dissipation becomes:
PBOOST
=
12 • (1/ 36) • 5
20
=
0.084W
For an FE package with thermal resistance of 45°C/W,
ambient temperature savings would be:
T (ambient) savings = 0.116W • 45°C/W = 5°C
For a GN package with thermal resistance of 85°C/W,
ambient temperature savings would be:
T (ambient) savings = 0.116W • 85°C/W = 10°C
The 7V zener should be sized for excess of 0.116W
operation. The tolerances of the zener should be consid-
ered to ensure minimum VBOOST exceeds 3.3V + VDROOP.
D2 D4
D2
BOOST
C2
L1
VIN
VIN LT1956 SW
VOUT
C3
SHDN
BIAS
SYNC
FB
R1 +
C1
GND
VC
D1
R2
RC
CF
CC
1956 F09
Figure 9. BOOST Pin, Diode Selection
1956f
20
Share Link: 