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LT3954IUHE 데이터 시트보기 (PDF) - Linear Technology

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LT3954IUHE Datasheet PDF : 26 Pages
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LT3954
APPLICATIONS INFORMATION
respect to GND as illustrated in Figure 3. The output can
be expressed as:
VOUT
=
VBE
+
1.25 •
R3
R4
LT3954
FB
+
R3
VOUT
100k
R4
RSEN(EXT)
LED
ARRAY
COUT
3954 F03
Figure 3. Feedback Resistor Connection for
Buck Mode or Buck-Boost Mode LED Driver
ISP/ISN Short-Circuit Protection Feature
The ISP/ISN pins have a protection feature independent
of their LED current sense feature. The purpose of this
feature is to prevent the development of excessive cur-
rents that could damage the power components or the
load. The action threshold (VISP-ISN > 600mV, typical) is
above the default LED current sense threshold, so that no
interference will occur with current regulation. Exceeding
the threshold activates pull-downs on the DIM/SS and
PWM pins and causes the power switch to be turned off,
and the PWMOUT pin to be driven low for at least 4µs.
If an overcurrent condition is sensed at ISP/ISN and the
PWM pin is configured either to make an internal dimming
signal, or for always-on operation as shown in the appli-
cation titled Boost LED Driver with Output Short-Circuit
Protection, then the LT3954 will enter a hiccup mode of
operation. In this mode, after the initial response to the
fault, the PWMOUT pin re-enables the output switch at an
interval set by the capacitor on the PWM pin. If the fault
is still present, the PWMOUT pin will go low after a short
delay (typically 7µs) and turn off the output switch. This
fault-retry sequence continues until the fault is no longer
present in the output.
PWM Dimming Control
There are two methods to control the current source for
dimming using the LT3954. One method uses the CTRL
pin to adjust the current regulated in the LEDs. A second
method uses the PWM pin to modulate the current source
between zero and full current to achieve a precisely pro-
grammed average current. To make PWM dimming more
accurate, the switch demand current is stored on the VC
node during the quiescent phase when PWM is low. This
feature minimizes recovery time when the PWM signal
goes high. To further improve the recovery time, a dis-
connect switch may be used in the LED current path to
prevent the ISP node from discharging during the PWM
signal low phase.
The minimum PWM on or off time is affected by choice
of operating frequency and external component selection.
The best overall combination of PWM and analog dimming
capability is available if the minimum PWM pulse is at least
six switching cycles.
A low duty cycle PWM signal can cause excessive start-up
times if it were allowed to interrupt the soft-start sequence.
Therefore, once start-up is initiated by PWM > 1.3V, it will
ignore a logical disable by the external PWM input signal.
The device will continue to soft-start with switching and
PWMOUT enabled until either the voltage at SS reaches
the 1V level, or the output current reaches one-tenth of
the full-scale current. At this point the device will begin
following the dimming control as designated by PWM.
PWM Dimming Signal Generator
The LT3954 features a PWM dimming signal generator
with programmable duty cycle. The frequency of the square
wave signal at PWMOUT is set by a capacitor CPWM from
the PWM pin to GND according to the equation:
fPWM = 14kHz • nF/CPWM
The duty cycle of the signal at PWMOUT is set by a µA
scale current into the DIM/SS pin (see Figure 4).
Internally generated pull-up and pull-down currents on
the PWM pin are used to charge and discharge its capaci-
tor between the high and low thresholds to generate the
duty cycle signal. These current signals on the PWM pin
are small enough so they can be easily overdriven by a
digital signal from a microcontroller to obtain very high
dimming performance. The practical minimum duty cycle
3954fa
14
For more information www.linear.com/3954

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