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LTC2901-2IGN 데이터 시트보기 (PDF) - Linear Technology

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LTC2901-2IGN Datasheet PDF : 16 Pages
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LTC2901
APPLICATIO S I FOR ATIO
VTRIP
R3
1%
V3 OR V4
R4
1%
LTC2901
+
+– 0.5V
2901 F05
Figure 5. Setting the Positive Adjustable Trip Point
12
VREF
R4
1% 13 V4
R3
1%
VTRIP
LTC2901
+
2901 F06
Figure 6. Setting the Negative Adjustable Trip Point
In a negative adjustable application, the minimum value
for R4 is limited by the sourcing capability of VREF (±1mA).
With no other load on VREF, R4 (minimum) is:
1.21V ÷ 1mA = 1.21kΩ.
Tables 2 and 3 offer suggested 1% resistor values for
various adjustable applications.
Once the resistor divider is set in the 5% tolerance mode
(LTC2901-3/LTC2901-4), there is no need to change the
divider for the 10% mode because the internal and exter-
nal reference is scaled accordingly, moving the trip point
by –5%.
Although all four supply monitor comparators have built-
in glitch immunity, bypass capacitors on V1 and V2 are
recommended because the greater of V1 or V2 is also the
VCC for the device. Filter capacitors on the V3 and V4
inputs are allowed.
Power-Down
On power-down, once any of the VX inputs drop below
their threshold, RST and COMPX are held at a logic low.
A logic low of 0.4V is guaranteed until both V1 and V2
drop below 1V. If the bandgap reference becomes invalid
12
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Table 2. Suggested 1% Resistor Values for the ADJ Inputs
VSUPPLY (V)
12
VTRIP (V)
11.25
R3 (kΩ)
2150
R4 (kΩ)
100
10
9.4
1780
100
8
7.5
1400
100
7.5
7
1300
100
6
5.6
1020
100
5
4.725
845
100
3.3
3.055
511
100
3
2.82
464
100
2.5
2.325
365
100
1.8
1.685
237
100
1.5
1.410
182
100
1.2
1.120
124
100
1
0.933
86.6
100
0.9
0.840
68.1
100
Table 3. Suggested 1% Resistor Values for the –ADJ Input
VSUPPLY (V)
–2
VTRIP (V)
–1.87
R3 (kΩ)
187
R4 (kΩ)
121
–5
– 4.64
464
121
– 5.2
– 4.87
487
121
–10
– 9.31
931
121
–12
–11.30
1130
121
(VCC < 2V typ), the part will reprogram once VCC rises
above 2.4V max.
Monitor Output Rise and Fall Time Estimation
All of the outputs (RST, COMPX, WDO) have strong pull-
down capability. If the external load capacitance (CLOAD)
for a particular output is known, output fall time (10% to
90%) is estimated using:
tFALL 2.2 • RPD • CLOAD
where RPD is the on-resistance of the internal pull-down
transistor. The typical performance curve (VOL vs ISINK)
demonstrates that the pull-down current is somewhat
linear versus output voltage. Using the 25°C curve, RPD is
estimated to be approximately 40Ω. Assuming a 150pF
load capacitance, the fall time is about 13.2ns.
Although the outputs are considered to be “open-drain,”
they do have a weak pull-up capability (see COMPX or RST
2901fb

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