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LTM4615 데이터 시트보기 (PDF) - Linear Technology

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LTM4615 Datasheet PDF : 24 Pages
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LTM4615
APPLICATIONS INFORMATION
TRACK1 is the track ramp applied to the slave’s track pin.
TRACK1 applies the track reference for the slave output up
to the point of the programmed value at which TRACK1
proceeds beyond the 0.8V reference value. The TRACK1
pin must go beyond the 0.8V to ensure the slave output
has reached its final value.
Ratiometric tracking can be achieved by a few simple
calculations and the slew rate value applied to the master’s
TRACK pin. As mentioned above, the TRACK pin has a
control range from 0V to 0.8V. The control ramp slew rate
applied to the master’s TRACK pin is directly equal to the
master’s output slew rate in Volts/Time.
The equation:
MR
SR
4.99k
=
RTB
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
tracking is desired, then MR and SR are equal, thus RTB
is equal to 4.99k. RTA is derived from equation:
RTA =
VFB
0.8V
+ VFB VTRACK
4.99k RFB RTB
where VFB is the feedback voltage reference of the regula-
tor, and VTRACK is 0.8V. Since RTB is equal to the 4.99k top
feedback resistor of the slave regulator in equal slew rate
or coincident tracking, then RTA is equal to RFB with VFB =
VTRACK. Therefore RTB = 4.99k and RTA = 10k in Figure 2.
MASTER OUTPUT
SLAVE OUTPUT
TIME
4615 F03
Figure 3. Output Voltage Coincident Tracking
Figure 3 shows the output voltage tracking waveform for
coincident tracking.
In ratiometric tracking, a different slew rate maybe desired
for the slave regulator. RTB can be solved for when SR is
slower than MR. Make sure that the slave supply slew rate
is chosen to be fast enough so that the slave output voltage
will reach it final value before the master output.
For example, MR = 2.5V/ms and SR = 1.8V/1ms. Then
RTB = 6.98k. Solve for RTA to equal to 3.24k. The master
output must be greater than the slave output for the
tracking to work. Output load current must be present
for tracking to operate properly during power-down.
Power Good
PGOOD1 and PGOOD2 are open-drain pins that can be
used to monitor valid output voltage regulation. These pins
monitor a ±7.5% window around the regulation point.
COMP Pin
This pin is the external compensation pin. The module has
already been internally compensated for all output voltages.
Table 4 is provided for most application requirements. The
Linear Technology μModule Power Design Tool will be
provided for other control loop optimization. The COMP
pins must be tied together in parallel operation.
Parallel Switching Regulator Operation
The LTM4615 switching regulators are inherently current
mode control. Paralleling will have very good current
sharing. This will balance the thermals on the design.
Figure 13 shows a schematic of a parallel design. The
voltage feedback equation changes with the variable N
as channels are paralleled.
The equation:
VOUT
=
0.8V
4.99k
N
+
RFB
RFB
N is the number of paralleled channels.
4615f
13

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