M25P20 데이터 시트보기 (PDF) - STMicroelectronics

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M25P20

2 Mbit, low voltage, Serial Flash memory with 50MHz SPI bus interface

STMicroelectronics 

M25P20

5

Memory organization

Memory organization

The memory is organized as:

● 262,144 bytes (8 bits each)

● 4 sectors (512 Kbits, 65536 bytes each)

● 1024 pages (256 bytes each).

Each page can be individually programmed (bits are programmed from 1 to 0). The device is

Sector or Bulk Erasable (bits are erased from 0 to 1) but not Page Erasable.

Table 3. Memory Organization

Sector

3

30000h

2

20000h

1

10000h

0

00000h

Address Range

3FFFFh

2FFFFh

1FFFFh

0FFFFh

Figure 6. Block Diagram

HOLD

W

S

C

D

Q

Control Logic

High Voltage

Generator

I/O Shift Register

Address Register

and Counter

256 Byte

Data Buffer

Status

Register

3FFFFh

30000h

20000h

Size of the

read-only

memory area

10000h

00000h

256 Bytes (Page Size)

000FFh

X Decoder

AI04079

15/50

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