M28C64-25NS6T 데이터 시트보기 (PDF) - STMicroelectronics

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M28C64-25NS6T

64 Kbit (8K x 8) Parallel EEPROM With Software Data Protection

STMicroelectronics 

Figure 15. Data Polling Sequence Waveforms

A0-A12

Address of the last byte of the Page Write instruction

M28C64

E

G

W

DQ7

DQ7

LAST WRITE

DQ7

DQ7

DQ7

INTERNAL WRITE SEQUENCE

Figure 16. Toggle Bit Sequence Waveforms

A0-A12

DQ7

READY

AI00753C

E

G

W

DQ6

(1)

LAST WRITE

TOGGLE

INTERNAL WRITE SEQUENCE

Note: 1. The Toggle Bit is first set to ‘0’.

READY

AI00754D

17/24

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