M2V56S20AKT 데이터 시트보기 (PDF) - Mitsumi

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M2V56S20AKT

256M Synchronous DRAM

Mitsumi 

SDRAM (Rev.1.01)

Single Data Rate

MITSUBISHI LSIs

M2V56S20/ 30/ 40 AKT -5, -6, -7

July '01

256M Synchronous DRAM

Multi Bank Interleaving Read (CL=2, BL=4)

CLK

Command

A0-9,11-12

ACT

Xa

READ

tRCD

Ya

ACT

READ PRE

ACT

tRCD

tRP

Xb

Yb

Xa

A10 Xa

0

Xb

0

0

Xa

BA0-1 00

00

01

01 00

00

DQ

Qa0 Qa1 Qa2 Qa3 Qb0 Qb1 Qb2 Qb3

Read with Auto-Precharge (CL=2, BL=4)

CLK

Command ACT

READ

tRCD

BL

A0-9,11-12 Xa

Ya

ACT

tRP

Xa

A10 Xa

1

Xa

BA0-1 00

00

00

DQ

Qa0 Qa1 Qa2 Qa3

internal precharge starts

Auto-Precharge Timing (READ, BL=4)

CLK

Command

DQ

ACT

READ

tRCD

CL=2

BL

Qa0

Qa1

Qa2

Qa3

ACT

DQ

CL=3

Qa0 Qa1 Qa2 Qa3

internal precharge starts

MITSUBISHI ELECTRIC

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