M45PE16 데이터 시트보기 (PDF) - Numonyx -> Micron
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M45PE16 Datasheet PDF : 45 Pages
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Operating features
M45PE16
4.7
Status Register
The Status Register contains two status bits that can be read by the Read Status Register
(RDSR) instruction. See Section 6.4: Read Status Register (RDSR) for a detailed
description of the Status Register bits.
4.8
Protection modes
The environments where non-volatile memory devices are used can be very noisy. No SPI
device can operate correctly in the presence of excessive noise. To help combat this, the
M45PE16 boasts the following data protection mechanisms:
● Power-On Reset and an internal timer (tPUW) can provide protection against
inadvertent changes while the power supply is outside the operating specification.
● Program, Erase and Write instructions are checked that they consist of a number of
clock pulses that is a multiple of eight, before they are accepted for execution.
● All instructions that modify data must be preceded by a Write Enable (WREN)
instruction to set the Write Enable Latch (WEL) bit. This bit is returned to its reset state
by the following events:
– Power-up
– Reset (RESET) driven Low
– Write Disable (WRDI) instruction completion
– Page Write (PW) instruction completion
– Page Program (PP) instruction completion
– Page Erase (PE) instruction completion
– Sector Erase (SE) instruction completion
● The Hardware Protected mode is entered when Write Protect (W) is driven Low,
causing the first 256 pages of memory to become read-only. When Write Protect (W) is
driven High, the first 256 pages of memory behave like the other pages of memory
● In addition to the low power consumption feature, the Deep Power-down mode offers
extra software protection from inadvertent Write, Program and Erase instructions while
the device is not in active use.
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