M80C186XL12 데이터 시트보기 (PDF) - Intel

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M80C186XL12

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR

Intel 

AC CHARACTERISTICS

M80C186XL

271276 – 9

NOTES

1 Status inactive in state preceding T4

2 The data hold time lasts only until INTA goes inactive even if the INTA transition occurs prior to TCLDX (min)

3 INTA occurs one clock later in Slave Mode

4 For write cycle followed by interrupt acknowledge cycle

5 LOCK is active upon T1 of the first interrupt acknowledge cycle and inactive upon T2 of the second interrupt acknowl-

edge cycle

6 Changes in T-state preceding next bus cycle if followed by write

Figure 7 Interrupt Acknowledge Cycle Waveforms

31

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