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MB86434PF 데이터 시트보기 (PDF) - Fujitsu

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MB86434PF Datasheet PDF : 38 Pages
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MB86434
(6) Codec
• Input/output
Both the µ-law and A-law coding/decoding conversion processes used by the MB86434 codec are compatible with
CCITT Recommendation G.711. In addition, linear coding in the form of 14-bit two’s complement code can be output
starting with MSB values.
SYNC
Din, Dout
MSB
12
11
10
1
LSB
MSB
Code
LSB
01 11111 111111111
to
00 00000 000000001
00 00000 000000000
11 11111 111111111
to
10 00000 000000001
PTBO reference voltage (V)
1.1766
to
2.3986
2.4000
2.4014
to
3.6235
• The codec SYNC pin
The codec block requires the input of an 8 kHz sampling clock signal at the SYNC pin, as well as a data transfer
clock at the CLK pin. In order to conserve power consumption, whenever the SYNC pin or CLK pin signal is inactive,
the system goes into SYNC power-down mode and stops code conversion.
Also, if either the SYNC or CLK pins encounters jitter of 5 µs or greater, the system may go into power-down
mode.Table shows the status of output pins in SYNC power-down mode.
Pin symbol
SGC
SGO
VRH
DOUT
PTBO
BTPO
Operation
Normal operation (2.4 V)
Normal operation (2.4 V)
Normal operation (4.0 V)
H-level fixed
SGC
High impedance
16

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