MAX1952ESA 데이터 시트보기 (PDF) - Maxim Integrated

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MAX1952ESA

1MHz, All-Ceramic, 2.6V to 5.5V Input, 2A PWM Step-Down DC-to-DC Regulators

Maxim Integrated 

1MHz, All-Ceramic, 2.6V to 5.5V Input,

2A PWM Step-Down DC-to-DC Regulators

Typical Operating Characteristics), the controller

responds by regulating the output voltage back to its

nominal state. The controller response time depends on

the closed-loop bandwidth. A higher bandwidth yields

a faster response time, thus preventing the output from

deviating further from its regulating value.

Compensation Design

The double pole formed by the inductor and output

capacitor of most voltage-mode controllers introduces a

large phase shift, that requires an elaborate compensa-

tion network to stabilize the control loop. The MAX1951/

MAX1952 utilize a current-mode control scheme that reg-

ulates the output voltage by forcing the required current

through the external inductor, eliminating the double pole

caused by the inductor and output capacitor, and greatly

simplifying the compensation network. A simple type 1

compensation with single compensation resistor (R1) and

compensation capacitor (C2) creates a stable and high-

bandwidth loop.

An internal transconductance error amplifier compen-

sates the control loop. Connect a series resistor and

capacitor between COMP (the output of the error ampli-

fier) and GND to form a pole-zero pair. The external

inductor, internal current-sensing circuitry, output

capacitor, and the external compensation circuit deter-

mine the loop system stability. Choose the inductor and

output capacitor based on performance, size, and cost.

Additionally, select the compensation resistor and

capacitor to optimize control-loop stability. The compo-

nent values shown in the typical application circuit

(Figure 2) yield stable operation over a broad range of

input-to-output voltages.

The basic regulator loop consists of a power modulator,

an output feedback divider, and an error amplifier. The

power modulator has DC gain set by gmc x RLOAD,

with a pole-zero pair set by RLOAD, the output capaci-

tor (COUT), and its ESR. The following equations define

the power modulator:

Modulator gain:

GMOD = ΔVOUT/ΔVCOMP = gmc x RLOAD

Modulator pole frequency:

fpMOD = 1 / (2 x π x COUT x (RLOAD+ESR))

Modulator zero frequency:

fzESR = 1 /(2 x π x COUT x ESR)

where, RLOAD = VOUT/IOUT(MAX), and gmc = 4.2S.

The feedback divider has a gain of GFB = VFB / VOUT,

where VFB is equal to 0.8V. The transconductance error

amplifier has a DC gain, GEA(DC), of 70dB. The com-

pensation capacitor, C2, and the output resistance of

the error amplifier, ROEA (20MΩ), set the dominant

pole. C2 and R1 set a compensation zero. Calculate the

dominant pole frequency as:

fpEA = 1/(2πx CC x ROEA)

Determine the compensation zero frequency is:

fzEA = 1/(2π x CC x RC)

For best stability and response performance, set the

closed-loop unity-gain frequency much higher than the

modulator pole frequency. In addition, set the closed-

loop crossover unity-gain frequency less than, or equal

to, 1/5 of the switching frequency. However, set the

maximum zero crossing frequency to less than 1/3 of

the zero frequency set by the output capacitance and

its ESR when using POSCAP, SPCAP, OSCON, or other

electrolytic capacitors.The loop-gain equation at the

unity-gain frequency is:

GEA(fc) x GMOD(fc) x VFB/VOUT = 1

where GEA(fc) = gmEA x R1, and GMOD(fc) = gmc x

RLOAD x fpMOD/fC, where gmEA = 60µS.

R1 calculated as:

R1 = VOUT x K/(gmEA x VFB x GMOD(fc))

where K is the correction factor due to the extra phase

introduced by the current loop at high frequencies

(>100kHz). K is related to the value of the output

capacitance (see Table 1 for values of K vs. C). Set the

error-amplifier compensation zero formed by R1 and C2

at the modulator pole frequency at maximum load. C2

is calculated as follows:

C2 = (VOUT x COUT/(R1 x IOUT(MAX))

As the load current decreases, the modulator pole also

decreases; however, the modulator gain increases

accordingly, resulting in a constant closed-loop unity-

gain frequency. Use the following numerical example to

calculate R1 and C2 values of the typical application

circuit of Figure 2a.

Table 1. K Value

DESCRIPTION

COUT (µF) K Values are for output inductance from 1.2µH

10 0.55 to 2.2µH. Do not use output inductors larger

22

0.47 than 2.2µH. Use fC = 200kHz to calculate R1.

VOUT = 1.5V

IOUT(MAX) = 1.5A

COUT = 10µF

RESR = 0.010Ω

gmEA = 60µS

10 ______________________________________________________________________________________

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