MAX6955 데이터 시트보기 (PDF) - Maxim Integrated

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MAX6955

2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan

Maxim Integrated 

MAX6955

2-Wire Interfaced, 2.7V to 5.5V

LED Display Driver with I/O

Expander and Key Scan

Timing Characteristics

(Typical Operating Circuit, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TIMING CHARACTERISTICS

Serial Clock Frequency

fSCL

Bus Free Time Between a STOP

and a START Condition

tBUF

1.3

Hold Time (Repeated) START

Condition

tHD, tSTA

0.6

Repeated START Condition Setup

Time

tSU, tSTA

0.6

STOP Condition Setup Time

tSU:STO

0.6

Data Hold Time

tHD, tDAT (Note 3)

Data Setup Time

tSU, tDAT

100

SCL Clock Low Period

tLOW

1.3

SCL Clock High Period

tHIGH

0.6

Rise Time of Both SDA and SCL

Signals, Receiving

tR

(Notes 2, 4)

Fall Time of Both SDA and SCL

Signals, Receiving

tF

(Notes 2, 4)

Fall Time of SDA Transmitting

tF, tX (Notes 2, 5)

Pulse Width of Spike Suppressed

tSP

(Notes 2, 6)

0

Capacitive Load for Each

Bus Line

CB

(Note 2)

TYP MAX UNITS

400

kHz

µs

µs

µs

µs

0.9

µs

ns

µs

µs

20 +

0.1CB

300

ns

20 +

0.1CB

300

ns

20 +

300

ns

0.1CB

50

ns

400

pF

Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design.

Note 2: Guaranteed by design.

Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL- of the SCL signal) in order to

bridge the undefined region of SCL’s falling edge.

Note 4: CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+.

Note 5: ISINK ≤ 6mA. CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+.

Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.

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