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MAX781CBX 데이터 시트보기 (PDF) - Maxim Integrated

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MAX781CBX
MaximIC
Maxim Integrated MaximIC
MAX781CBX Datasheet PDF : 24 Pages
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PDA/Hand-Held Computer Power Controller
DHI high-side drives an external N-channel power
MOSFET, M1. Inside the MAX781, the DHI driver is
well-isolated so it can be powered separately from the
rest of the chip. The DHI driver is powered by current
that flows into BST and out of LX. Thus, BST is the
“power” connection and LX is the “ground” connection
for the DHI driver. An internal level shifter allows the
MAX781 internal circuitry to communicate with the DHI
driver.
RSENSE, connected from CS to 3OUT, senses current in
the primary of transformer T1. With no load on VHI, the
primary of T1 can be treated as the inductor in a cur-
rent-mode buck converter. RSENSE detects current in
the primary and turns off M1 when the current limit is
reached. The current limit is adjusted to ensure that
3OUT stays at 3.3V. With M1 off, M2 stays on until the
voltage on RSENSE reaches zero. There is an absolute
current limit that protects the output in the event 3OUT
is short circuited to ground. When the voltage from
3OUT to CS reaches 100mV, M1 is turned off whether
or not 3OUT is in regulation.
A capacitor (C5) on the soft-start (SS) pin allows the
current limit to slowly ramp up when power is first
applied. A 4µA current source from 3OUT feeds the SS
pin. The ramp time to full current limit is approximately
1ms for every nanofarad of capacitance on SS, with a
minimum value of 10ns. Once the SS pin reaches 3.3V,
the maximum peak current is available.
UVLO prevents the buck regulator and battery charger
from switching if 5OUT is out of regulation. The voltage
on UVLO is compared to REF. If UVLO is greater than
REF, the buck regulator and battery charger will func-
tion normally. With UVLO less than REF, the buck regu-
lator and battery charger stay off and the low-power
mode linear regulator supplies 3OUT, whether or not
operate mode has been set. Tying UVLO to AGND
allows an internal resistive divider to feed the UVLO com-
parator, preventing operation of the buck regulator and
battery charger for 5OUT voltages less than approximately
4.35V (see the Electrical Characteristics).
The MAX781 3.3V buck regulator is similar to the 3.3V
buck regulator on the MAX783. For further information,
refer to the MAX783 data sheet
Idle Regulation vs. PWM Regulation
In operate mode, 3OUT can be regulated using pulse-
skipping (Idle-Mode™ regulation) or pulse-width-modu-
lation (PWM) regulation. The IDLE bit selects the
regulation scheme used for load current below about
25% of current limit.
Idle-Mode™ regulation pulses M1 until 25% of the
absolute current limit is reached, at which point M1
turns off. M1 does not turn on again until 3OUT falls
below 3.3V. This scheme improves light-load efficiency
by minimizing the number of times M1 needs to be
turned on to keep 3OUT in regulation. However, the
operating frequency varies with load. At load currents
above 25% of current limit, the regulator uses resonant
frequency PWM regulation independent of the idle bit.
PWM regulation turns M1 on at a constant frequency
and modulates M1’s duty cycle to maintain the current
required to keep 3OUT in regulation. The switching fre-
quency remains constant regardless of the load cur-
rent. Operating with a constant frequency results in
lower amplitude and more easily filtered output ripple.
The SYNC pin either sets the internal switching fre-
quency or synchronizes the MAX781 to an external
oscillator. Tying SYNC to REF sets a switching fre-
quency of 300kHz. Tying SYNC to 5V or AGND sets a
230kHz switching frequency. Driving SYNC with an
external oscillator synchronizes the PWM switching with
the external oscillator.
VPP Regulator
VPPA and VPPB linear regulate VHI down to
0V/+3.3V/+5V/+12V for use as a PCMCIA VPP voltage.
The VPPB0, VPPB1, VPPA0, VPPA1 bits control the
VPPB and VPPA output voltage. Programming VPPA or
VPPB to 0V shuts off the linear regulator and saves qui-
escient supply current. Table 5 shows how to program
the VPPA and VPPB control bits.
During the flyback phase of the buck converter (DLO
on), VHI loads 3OUT. As long as DLO is on, power can
be supplied to VHI. When 3OUT has a light load, DLO
may not stay on long enough to supply power to VHI.
To prevent VHI from sagging, an internal comparator
checks VHI. If VHI sags below 12.8V, DLO is turned on
for 1µs to provide power to VHI, regardless of the volt-
age on RSENSE. Power can only be delivered to VHI in
operate mode when the buck switching regulator is
active.
The VHI pin includes an overvoltage clamp that sinks
current if VHI exceeds 19V.
This prevents the parasitic capacitance in transformer
T1 from causing the VHI voltage to climb without limit.
™Idle-Mode is a trademark of Maxim Integrated Products.
14 ______________________________________________________________________________________

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