MAX8794ETB(2006) 데이터 시트보기 (PDF) - Maxim Integrated

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MAX8794ETB
(Rev.:2006)

Low-Voltage DDR Linear Regulator

Maxim Integrated 

Low-Voltage DDR Linear Regulator

SHDN

200µs

CURRENT LIMIT

POWER-GOOD

WINDOW

OUTPUT OVERLOAD

CONDITION

OUT

PGOOD

2ms STARTUP

DELAY

10µs

PROPAGATION

DELAY

10µs

PROPAGATION

DELAY

Figure 3. MAX8794 PGOOD and Soft-Start Waveforms

Power-Good (PGOOD)

The MAX8794 provides an open-drain PGOOD output

that goes high 2ms (typ) after the output initially reach-

es regulation during startup. PGOOD transitions low

10µs after the output goes out of regulation by ±150mV,

or when the device enters shutdown. Connect a pullup

resistor from PGOOD to VCC for a logic-level output.

Use a 100kΩ resistor to minimize current consumption.

Applications Information

Dynamic Output-Voltage Transitions

By changing the voltage at REFIN, the MAX8794 can

be used in applications that require dynamic output-

voltage changes between two set points (graphics

processors). Figure 4 shows a dynamically adjustable

resistive voltage-divider network at REFIN. Using an

external signal MOSFET, a resistor can be switched in

and out of the REFIN resistor-divider, changing the volt-

age at REFIN. The two output voltages are determined

by the following equations:

VOUT(LOW)

=

VREF

⎛ R2 ⎞

⎝⎜ R1 + R2⎠⎟

⎡ (R2 + R3) ⎤

( ) VOUT(HIGH)

=

VREF

⎢

⎣⎢R1

+

R2

+ R3

⎥

⎦⎥

REFERENCE

VOLTAGE

(VREF)

R1

CREFIN

R2

MAX8794

REFIN

VOUT(LOW)

VOUT(HIGH)

R3

( )R2

VOUT(LOW) = VREF R1 + R2

(R2 + R3)

VOUT(HIGH) = VREF R1 + (R2 + R3)

Figure 4. Dynamic Output-Voltage Change

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