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MB89182PFV 데이터 시트보기 (PDF) - Fujitsu

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MB89182PFV Datasheet PDF : 50 Pages
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s BLOCK DIAGRAM
MB89180 Series
X0
X1
X0A
X1A
Main clock oscillator
Clock controller
Subclock oscillator
(32.768 kHz)
8
P00/INT20
to P07/INT27
21-bit time-base timer
8
External interrupt 2
(wake-up function)
P30/RCO
P31/COM2
P32/COM3
CMOS I/O port
Remote control
transmission output
N-ch open-drain output port
(Only P30 for CMOS output port)
RST
Reset circuit
RAM
(256 × 8 bits max.)
F2MC-8L
CPU
ROM
(8 K × 8 bits max.)
MODA
VCC
VSS
Other pins
MODA
VCC
VSS
N-ch open-drain I/O port
8-bit timer/counter
8-bit timer/counter
P26 *2
P22/TO
P21 *2
P20/EC
8-bit serial I/O
P25/SCK
P24/SO
P23/SI
Buzzer output
CMOS I/O port
4
External interrupt 1
(wake-up function)
8
LCD controller/driver
16
32 × 4 bits
VRAM
N-ch open-drain output port
P27 *2 /BUZ
4
P14 to P17
4
P10/INT10 to
P13/INT13
4
SEG28 to SEG31 *1
(Also serve as P14 to P17.)
4
SEG24 to SEG27 *1
(Also serve as P10 to P13.)
8
SEG0 to SEG7
2
COM0, COM1
COM2 (Also serves as P31.)
COM3 (Also serves as P32.)
3
V1 to V3
4
P57/SEG23 *1
to P54/SEG20 *1
4
P53/SEG19 *1
to P50/SEG16 *1
4
P47/SEG15 *1
to P44/SEG12 *1
4
P43/SEG11 *1
to P40/SEG8 *1
*1: The segment or port function is selected by the mask option.
*2: N-ch open-drain heavy-current drive type
19

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