MB89850R 데이터 시트보기 (PDF) - Fujitsu

부품명

상세내역

제조사

MB89850R

8-bit Proprietary Microcontroller

Fujitsu 

MB89850R Series

(7) Bus Write Timing

(VCC = +5.0 V±10%, FC = 10 MHz, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)

Parameter

Symbol Pin name Condition

Value (10 MHz)

Min.

Max.

Valid address → ALE ↓ time tAVLL

ALE ↓ time → address

invalid time

tLLAX

AD7 to AD0,

ALE, A15 to A08

1/4 tinst *1 – 64 ns

—

5

—

Valid address → WR ↓ time tAVWL

WR, ALE

1/4 tinst *1 – 60 ns

—

WR pulse width

tWLWH

WR

1/2 tinst *1 – 20 ns

—

Write data → WR ↑ time

tDVWH

AD7 to AD0, WR

1/2 tinst *1 – 60 ns

—

Load

WR ↑ → address invalid time tWHAX

WR, A15 to A08 condition: 1/4 tinst *1 – 40 ns

—

WR ↑ → data hold time

tWHDX

AD7 to AD0, WR 50 pF

1/4 tinst *1 – 40 ns

—

WR ↑ → ALE ↑ time

tWHLH

WR, ALE

1/4 tinst *1 – 40 ns

—

WR ↓ → CLK ↑ time

CLK ↓ → WR ↑ time

tWLCH

tCLWH

WR, CLK

1/4 tinst *1 – 60 ns

—

0

—

ALE pulse width

tLHLL

ALE

tXCYL – 35 ns*2

—

ALE ↓ → CLK ↑ time

tLLCH

ALE, CLK

tXCYL – 35 ns*2

—

Unit Remarks

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

*1: For information on tinst, see “(4) Instruction Cycle.”

*2: These characteristics are also applicable to the bus read timing.

CLK

ALE

AD

A

WR

2.4 V

tLHLL

2.4 V

tAVLL

tLLCH

0.8 V

tLLAX

2.4 V 2.4 V

0.8 V 0.8 V

2.4 V

0.8 V

tDVWH

2.4 V

0.8 V

tAVWL

tWLCH

0.8 V

tWLWH

0.8 V

t WHLH

0.8 V

2.4 V

0.8 V

tWHDX

2.4 V

tCLWH

0.8 V

tWHAX

2.4 V

29

Share Link: