MB89490 데이터 시트보기 (PDF) - Fujitsu

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MB89490

8-bit Proprietary Microcontroller

Fujitsu 

MB89490 Series

■ PROGRAMMING AND ERASING FLASH MEMORY ON THE MB89F499

1. Flash Memory

The flash memory is located between 1000H and FFFFH in the CPU memory map and incorporates a flash

memory interface circuit that allows read access and program access from the CPU to be performed in the same

way as mask ROM. Programming and erasing flash memory is also performed via the flash memory interface

circuit by executing instructions in the CPU. This enables the flash memory to be updated in place under the

control of the CPU, providing an efficient method of updating program and data.

2. Flash Memory Features

• 60 K byte × 8-bit configuration (16 K + 8 K + 8 K + 28 K sectors)

• Automatic programming algorithm (Embedded algorithm* : Equivalent to MBM29LV200)

• Includes an erase pause and restart function

• Data polling and toggle bit for detection of program/erase completion

• Detection of program/erase completion via CPU interrupt

• Compatible with JEDEC-standard commands

• Sector Protection (sectors can be combined in any combination)

• No. of program/erase cycles : 10,000 (Min)

*: Embedded Algorithm is a trademark of Advanced Micro Devices.

3. Procedure for Programming and Erasing Flash Memory

Programming and reading flash memory cannot be performed at the same time. Accordingly, to program or

erase flash memory, the program must first be copied from flash memory to RAM so that programming can be

performed without program access from flash memory.

4. Flash Memory Register

• Control status register (FMCS)

Address

007AH

Bit 7

INTE

R/W

Bit 6

RDYINT

R/W

Bit 5

WE

R/W

Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

RDY Reserved Reserved — Reserved

R

R/W R/W

—

R/W

Initial value

000X00-0B

5. Sector Configuration

The table below shows the sector configuration of flash memory and lists the addresses of each sector for both

during CPU access a flash memory programming.

• Sector configuration of flash memory

Flash Memory

CPU Address

Programmer Address*

16 K bytes

8 K bytes

8 K bytes

FFFFH to C000H

BFFFH to A000H

9FFFH to 8000H

1FFFFH to 1C000H

1BFFFH to 1A000H

19FFFH to 18000H

28 K bytes

7FFFH to 1000H

17FFFH to 11000H

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