MB89680 데이터 시트보기 (PDF) - Fujitsu

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MB89680

8-bit Proprietary Microcontroller

Fujitsu 

s BLOCK DIAGRAM

RST

X0

X1

X0A

X1A

P00 to P07 8

Timebase timer

Reset circuit

(Watchdog)

Main clock oscillator

(max 8 MHz)

Clock controller

Subclock oscillator

(32.768 kHz)

CMOS I/O port 0

P10 to P17 8

CMOS I/O port 1

P20 to P27 8

CMOS I/O port 2

RAM

F2MC-8L

CPU

ROM

Other pins

VCC × 2, VSS × 2

MOD0, MOD1, N.C.

AVCC, AVR, AVSS

MB89680 Series

CMOS I/O

8-bit PWM timer

P30/PWM

Buzzer output

Modem timer

UART

P31/BUZR

P32/MSKI

P33

P34

P35/UCK1

P36/UI1

P37/UO1

5

N-ch open-drain output port 4

P40 t o P44

N-ch open-drain output

8-bit A/D

8

converter

CMOS I/O

8/16-bit timer

Modem output

8-bit serial I/O

with 1-byte buffer

8

P50/AN00

t o P57/AN07

P60/TMO1

P61/TMO2

P62/TCLK

P63/MSKO

P64

P65/BSK1

P66/BSI1

P67/BSO1

N-ch open-drain I/O

P70/UCK2

P71/UI2

P72/UO2

P73/BSK2

P74/BSI2

P75/BSO2

P76

P77

8

N-ch open-drain output port 8

P80 t o P87

CMOS I/O

12

External interrupt 2

4

External interrupt 1

8

P90/INL0

4 t o P97/INL7

PA0/INL8

4 t o PA3/INLB

PA4/INT0

t o PA7/INT3

15

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