MB90F543 데이터 시트보기 (PDF) - Fujitsu
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MB90F543 Datasheet PDF : 67 Pages
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MB90540/540G/545/545G Series
s BLOCK DIAGRAM
X0, X1
X0A, X1A
RST
HST
Clock
Controller
RAM
2 K/4 K/6 K/8 K
SOT0
SCK0
SIN0
SOT1
SCK1
SIN1
SOT2
SCK2
SIN2
AVCC
AVSS
AN0 to AN7
AVRH
AVRL
ADTG
ROM/Flash
128 K/256 K/
64K(ROM only)
Prescaler
UART0
Prescaler
UART1
(SCI)
Prescaler
Serial I/O
10-bit A/D
Converter
8 ch.
F2MC 16LX
CPU
* : Only the MB90540 series has two channels
16-bit I/O
Timer
16-bit Input
Capture
8 ch.
16-bit Output
Compare
4 ch.
8/16-bit
PPG
4 ch.
CAN
Controller
16-bit Reload
Timer 2 ch.
External
Bus
Interface
External
Interrupt
8 ch.
IN0 to IN5
IN6/OUT2,
IN7/OUT3
OUT0, OUT1
PPG0 to PPG3
RX0, RX1 *
TX0, TX1 *
TIN0, TIN1
TOT0, TOT1
AD00 to AD15
A16 to A23
ALE
RD
WRL
WRH
HRQ
HAK
RDY
CLK
INT0 to INT7
21
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