MC14551BCL 데이터 시트보기 (PDF) - Motorola => Freescale
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MC14551BCL Datasheet PDF : 9 Pages
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ÎÎÎÎEÎÎÎÎLEÎÎÎÎCTRÎÎÎÎICAÎÎÎÎL CÎÎÎÎHAÎÎÎÎRACÎÎÎÎTEÎÎÎÎRISÎÎÎÎTICÎÎÎÎS (CÎÎÎÎL=ÎÎÎÎ50pÎÎÎÎF,TAÎÎÎÎ=2ÎÎÎÎ5_CÎÎÎÎ,VEÎÎÎÎEvÎÎÎÎVSVSÎÎÎÎD)DÎÎÎΖVEÎÎÎÎE ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Characteristic
Symbol
Vdc
Min
Typ #
Max
Unit
Propagation Delay Times
Switch Input to Switch Output (RL = 10 kΩ)
tPLH, tPHL = (0.17 ns/pF) CL + 26.5 ns
tPLH, tPHL = (0.08 ns/pF) CL + 11 ns
tPLH, tPHL = (0.06 ns/pF) CL + 9.0 ns
tPLH, tPHL
5.0
10
15
ns
—
35
90
—
15
40
—
12
30
Control Input to Output (RL = 10 kΩ)
VEE = VSS (Figure 4)
tPLH, tPHL
5.0
10
15
ns
—
350
875
—
140
350
—
100
250
Second Harmonic Distortion
RL = 10 kΩ, f = 1 kHz, Vin = 5 Vp–p
—
10
—
0.07
—
%
Bandwidth (Figure 5)
RL = 1 kΩ, Vin = 1/2 (VDD – VEE) p–p,
20 Log (Vout / Vin) = – 3 dB, CL = 50 pF
BW
10
—
17
—
MHz
Off Channel Feedthrough Attenuation, Figure 5
RL = 1 kΩ, Vin = 1/2 (VDD – VEE) p–p,
fin = 55 MHz
—
10
—
– 50
—
dB
Channel Separation (Figure 6)
RL = 1 kΩ, Vin = 1/2 (VDD – VEE) p–p,
fin = 3 MHz
—
10
—
– 50
—
dB
Crosstalk, Control Input to Common O/I, Figure 7
R1 = 1 kΩ, RL = 10 kΩ,
Control tr = tf = 20 ns
—
10
—
75
—
mV
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However,
precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance
circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD for control inputs and VEE ≤
(Vin or Vout) ≤ VDD for Switch I/O.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS, VEE, or VDD). Unused outputs must
be left open.
MOTOROLA CMOS LOGIC DATA
MC14551B
3
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