MC145540 데이터 시트보기 (PDF) - Motorola => Freescale

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MC145540

ADPCM Codec

Motorola => Freescale 

FST (FSR)

BCLKT (BCLKR)

DT

1

2

DR

DON'T CARE

1

2

DON'T CARE

Figure 2-6. Long Frame Sync — 16 kbps ADPCM Data Timing

FST (FSR)

BCLKT (BCLKR)

DT

1

2

3

4

DR

DON'T CARE

1

2

3

4

DON'T CARE

Figure 2-7. Short Frame Sync — 32 kbps ADPCM Data Timing

2.4.4 Serial Control Port (SCP) Interface

The MC145540 is equipped with an industry standard Serial Control Port Interface. The Serial Control

Port (SCP) is used by an external controller, such as an M68HC05 family microcontroller, to communi-

cate with the MC145540 ADPCM Codec.

The SCP is a full-duplex four-wire interface used to pass control and status information to and from the

ADPCM Codec. The Serial Control Port Interface consists of a transmit output, a receive input, a data

clock, and an enable signal. These device pins are known as SCP Tx, SCP Rx, SCP CLK, and

SCP EN, respectively. The SCP Clock determines the rate of exchange of data in both the transmit and

receive directions, and the SCP Enable signal governs when this exchange is to take place.

The operation and configuration of the ADPCM Codec is controlled by setting the state of the control

and status registers within the MC145540 and then monitoring these control and status registers. The

control and status registers reside in sixteen 8-bit wide Byte Registers, BR0-BR15. A complete register

map and detailed register descriptions can be found in Section 3.

2.4.4.1

BYTE REGISTER OPERATIONS

The 16 Byte Registers are addressed by addressing a 4-bit byte register address (A3:A0) as shown in

Figures 2-8 and 2-9. A second 8-bit operation transfers the data word (D7:D0). Alternatively, these

registers can be accessed with a single 16-bit operation as shown in Figures 2-10 and 2-11.

PDI/RESET

Power Down Input/Reset (Pin 13)

A logic 0 applied to this input forces the device into a low power dissipation mode. A rising edge on this

pin causes power to be restored and the ADPCM RESET state (specified in the standards) to be forced.

See Section 2.2.5 for additional information.

MOTOROLA

MC145540

2-15

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