OKI Semiconductor
FEDL66525-02
ML66525 Family
AC Characteristics (Except USB port)
(1) External program memory control
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Parameter
Symbol
Condition
Min.
Max.
Unit
Cycle time
tcyc
fOSC = 24 MHz
41.67
—
Clock pulse width (HIGH level)
tφWH
Clock pulse width (LOW level)
tφWL
PSENn pulse width
tPW
16.25
—
16.25
—
(2 + 2n)tφ – 25
—
PSENn pulse delay time
Address setup time
Address hold time
tPD
VDD_CORE =
tAS
CL = 50 pF
tAH
—
2tφ – 25
–10
55
ns
—
—
Instruction setup time
tIS
40
—
Instruction hold time
tIH
Read data access time
tACC
0
—
—
(3 + 2n)tφ – 50
(Note) tφ = tcyc/2
n = 0 to 3 ( n wait cycles inserted)
CPUCLK
PSENn
A0 to A19
D0 to D7
tcyc
tφWH
tφWL
tPD
tPW
PC0 to 19
tAS
tAH
INST0 to 7
tACC
tIS
tIH
Bus timing during no wait cycle time
16/27