MSM6262-XX 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM6262-XX

DOT MATRIX LCD CONTROLLER WITH 48-DOT COMMON DRIVER

Oki Electric Industry 

¡ Semiconductor

MSM6262-xx

4. Timing Generator Circuit

This circuit generates the timing signal for the internal operation by CPU's instruction as well

as to operate the internal circuit of DD RAM, CG RAM, CG ROM and so forth. It also generates

the transfer signal to the SEGMENT driver (MSM5839C or MSM5259).

The internal operation accessed by the CPU and internal operation for LCD display is

independent.

So, a manipulation such as writing data from CPU to DD RAM will not have an influence such

as display flickering upon any part other than the display part to which the data is written.

5. Display Data RAM (DD RAM)

DD RAM is used to store the 8-bit character code (refer to Table 1) and 1-bit under-line data.

The address of DD RAM corresponds to the display position on the LCD. The correspondence

is described below.

DD RAM address (set to ADC) is described as hexadecimal.

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

ADC MSB

LSB

Hexadecimal

Hexadecimal

Example: When DD RAM address is 3A

L L H HH L HL

3

A

(1) Relation between DD RAM and display position in 2-line display mode

Digit

1 23 4 5

1st line 00 01 02 03 04

2nd line 80 81 82 83 84

–––

–––

–––

79 80

4E 4F

CE CF

Display position

DD RAM address

(hexadecimal)

Note: The address of the last digit of the first line and the first digit of the second line

does not have any continuity.

(2) When 2 pieces of MSM5389C(or MSM5259) are connected to MSM6262-xx, 32

characters can be displayed from the first digit to yhe 16th degit.

Digit

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

1st line 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F

2nd line 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F

MSM5839C (1)

{ or MSM5259 (1)

MSM5839C (2)

MSM5259 (2) }

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