MSM7583 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM7583

π/4 Shift QPSK MODEM

Oki Electric Industry 

¡ Semiconductor

MSM7583

FUNCTIONAL DESCRIPTION

Control Registers

(1) CR0 (basic operation mode setting)

B7

CR0

ENVPD

Initial value (*) 0

B6

TXCSEL

0

B5

MODOFF

0

B4

IFSEL1

0

B3

IFSEL2

0

* The initial value is set when a reset signal is supplied at RESET.

B2

ENVSEL

0

B1

TEST1

0

B0

TEST0

0

B7: Transmit envelope output power down control

0/Envelope output ON

1/Envelope output OFF

B6: Transmit timing clock selection

0/TXCI input: 384 kHz.

TXCO output: 384 kHz output from APLL

Transmit data TXD is input in synchronization with the rising edge of

TXCI (APLL is on.)

1/TXCI input: 3.84 MHz.

TXCO output: 384 kHz (one-tenth of the TXCI frequency)

Transmit data TXD is input in synchronization with the rising edge of

TXCO (APLL is off.)

B5: Modulation on/off control

1/modulation OFF (with phase fixed)

0/modulation ON.

B4, B3: Receiver input IF frequency selection

(0, 0), (0, 1) : 1.2 MHz

(1, 0)

: 10.8 MHz

(1, 1)

: 10.7 MHz/10.75 MHz

B2: Transmit envelope (I2 + Q2 or I2 + Q2 ) output selection

When B1, B0 is (0, 0)

: 0/ I2 + Q2 output

1/I2 + Q2 output

When B1, B0 is other than (0, 0) : 0/Channel 1 receive monitor output

1/Channel 2 receive monitor output

B1, B0: Test mode selection bits. Each monitor output is output to the transmit ENV pin.

(0, 0): transmit envelope (I2 + Q2 or I2 + Q2 ) output

(0, 1): receiver phase detection signal output

(1, 0): receiver delay detection signal output

(1, 1): receiver internal AFC information output

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