MT46H16M32LF 데이터 시트보기 (PDF) - Micron Technology

부품명

상세내역

제조사

MT46H16M32LF

Mobile Low-Power DDR SDRAM

Micron Technology 

512Mb: x16, x32 Mobile LPDDR SDRAM

Electrical Specifications – AC Operating Conditions

23. DRAM devices should be evenly addressed when being accessed. Disproportionate ac-

cesses to a particular row address may result in reduction of the product lifetime.

24. For the automotive temperature parts, tREF = tREF/2 and tREFI = tREFI/2.

25. This is not a device limit. The device will operate with a negative value, but system per-

formance could be degraded due to bus turnaround.

26. It is recommended that DQS be valid (HIGH or LOW) on or before the WRITE command.

The case shown (DQS going from High-Z to logic low) applies when no WRITEs were

previously in progress on the bus. If a previous WRITE was in progress, DQS could be

HIGH during this time, depending on tDQSS.

27. The maximum limit for this parameter is not a device limit. The device will operate with

a greater value for this parameter, but system performance (bus turnaround) will de-

grade accordingly.

28. At least 1 clock cycle is required during tWR time when in auto precharge mode.

29. Clock must be toggled a minimum of two times during the tXSR period.

PDF: 09005aef83dd2b3e

t67m_512mb_mobile_lpddr.pdf - Rev. H 06/13 EN

30

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2009 Micron Technology, Inc. All rights reserved.

Share Link: