MT46H16M16 데이터 시트보기 (PDF) - Micron Technology

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MT46H16M16

Mobile DDR SDRAM

Micron Technology 

256Mb: x16, x32 Mobile DDR SDRAM

Operations

Figure 12: Example: Meeting tRCD (tRRD) MIN When 2 < tRCD (tRRD) MIN

T0

CK#

CK

Command

ACT

T1

T2

T3

T4

NOP

NOP

ACT

NOP

T5

T6

T7

NOP

RD/WR

NOP

A0–A12

Row

Row

Col

BA0, BA1

Bank x

READs

tRRD

Bank y

tRCD

Bank y

Don’t Care

READ burst operations are initiated with a READ command, as shown in Figure 13 on

page 28.

The starting column and bank addresses are provided with the READ command, and

auto precharge is either enabled or disabled for that burst access. If auto precharge is

enabled, the row being accessed is precharged at the completion of the burst. For the

READ commands used in the following illustrations, auto precharge is disabled.

During READ bursts, the valid data-out element from the starting column address will

be available following the CAS latency after the READ command. Each subsequent data-

out element will be valid nominally at the next positive or negative clock edge (for

example, at the next crossing of CK and CK#). Figure 14 on page 29 shows general timing

for different CAS latency settings. DQS is driven by the Mobile DDR SDRAM along with

output data. The initial LOW state on DQS is known as the read preamble; the LOW state

coincident with the last data-out element is known as the read postamble.

Upon completion of a burst, assuming no other commands have been initiated, the DQ

will go High-Z. A detailed explanation of tDQSQ (valid data-out skew), tQH (data-out

window hold), and the valid data window is depicted in Figure 37 on page 66. A detailed

explanation of tDQSCK (DQS transition skew to CK) and tAC (data-out transition skew to

CK) is depicted in Figure 39 on page 68.

Data from any READ burst may be concatenated with or truncated with data from a

subsequent READ command. In either case, a continuous flow of data can be main-

tained. The first data element from the new burst either follows the last element of a

completed burst or the last desired data element of a longer burst that is being trun-

cated. The new READ command should be issued x cycles after the first READ

command, where x equals the number of desired data element pairs (pairs are required

by the 2n-prefetch architecture). This is shown in Figure 15 on page 30. A READ

command can be initiated on any clock cycle following a previous READ command.

Nonconsecutive read data is illustrated in Figure 16 on page 31. Full-speed random read

accesses within a page (or pages) can be performed, as shown in Figure 17 on page 32.

PDF: 09005aef82091978 / Source: 09005aef8209195b

MT46H16M16LF__2.fm - Rev. H 6/08 EN

27

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2005 Micron Technology, Inc. All rights reserved.

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