MT48H16M16LFBF-8IT 데이터 시트보기 (PDF) - Micron Technology
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MT48H16M16LFBF-8IT Datasheet PDF : 71 Pages
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256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Register Definition
Figure 6:
Mode Register Definition
BA1 BA0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Address Bus
M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 Reserved WB OP Mode CAS Latency BT Burst Length
Mode
Register (Mx)
Program
M12, M11, M10 = “0, 0, 0”
to ensure compatibility
with future devices.
M14 M13 Mode Register Definintion
0 0 Base mode register
0 1 Reserved
1 0 Extended mode register
1 1 Reserved
M9
Write Burst Mode
0 Programmed burst length
1
Single location access
M8 M7 M6–M0 Operating Mode
0 0 Valid Normal operation
––
– All other states reserved
M6 M5 M4
000
001
010
011
100
101
110
111
M2 M1 M0
0 00
0 01
0 10
0 11
1 00
1 01
1 10
1 11
Burst Length
M3 = 0
1
2
4
8
Reserved
Reserved
Reserved
Reserved
M3 = 1
1
2
4
8
Reserved
Reserved
Reserved
Reserved
M3
0
1
CAS Latency
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
Burst Type
Sequential
Interleaved
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
14
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