MT48H16M16LFBF-8G 데이터 시트보기 (PDF) - Micron Technology

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MT48H16M16LFBF-8G

256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM

Micron Technology 

256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM

Commands

NO OPERATION (NOP)

The NO OPERATION (NOP) command is used to perform a NOP to an SDRAM which is

selected (CS# is LOW). This prevents unwanted commands from being registered during

idle or wait states. Operations already in progress are not affected.

LOAD MODE REGISTER (LMR)

The MR is loaded via inputs A0–A12, BA0, and BA1. (See “Mode Register” on page 13.)

The LMR and LOAD EXTENDED MODE REGISTER (LEMR) commands can only be

issued when all banks are idle, and a subsequent executable command cannot be issued

until tMRD is met.

ACTIVE

The ACTIVE command is used to open (or activate) a row in a particular bank for a

subsequent access. The value on the BA0, BA1 inputs selects the bank, and the address

provided selects the row. This row remains active (or open) for accesses until a

PRECHARGE command is issued to that bank. A PRECHARGE command must be issued

before opening a different row in the same bank.

READ

The READ command is used to initiate a burst read access to an active row. The value on

the BA0, BA1 inputs selects the bank, and the address provided selects the starting

column location. The value on input A10 determines whether or not auto precharge is

used. If auto precharge is selected, the row being accessed will be precharged at the end

of the read burst; if auto precharge is not selected, the row will remain open for subse-

quent accesses. Read data appears on the DQs subject to the logic level on the DQM

inputs two clocks earlier. If a given DQM signal was registered HIGH, the corresponding

DQs will be High-Z two clocks later; if the DQM signal was registered LOW, the DQs will

provide valid data.

WRITE

The WRITE command is used to initiate a burst write access to an active row. The value

on the BA0, BA1 inputs selects the bank, and the address provides the starting column

location. The value on input A10 determines whether or not auto precharge is used. If

auto precharge is selected, the row being accessed will be precharged at the end of the

write burst; if auto precharge is not selected, the row will remain open for subsequent

accesses. Input data appearing on the DQs is written to the memory array subject to the

DQM input logic level appearing coincident with the data. If a given DQM signal is regis-

tered LOW, the corresponding data will be written to memory; if the DQM signal is regis-

tered HIGH, the corresponding data inputs will be ignored, and a write will not be

executed to that byte/column location.

PRECHARGE

The PRECHARGE command is used to deactivate the open row in a particular bank or

the open row in all banks. The bank(s) will be available for a subsequent row access a

specified time (tRP) after the precharge command is issued. Input A10 determines

whether one or all banks are to be precharged, and in the case where only one bank is to

be precharged, inputs BA0, BA1 select the bank. Otherwise BA0, BA1 are treated as

“Don’t Care.” Once a bank has been precharged, it is in the idle state and must be acti-

vated prior to any READ or WRITE commands being issued to that bank.

PDF:09005aef8219eeeb/Source: 09005aef8219eedd

MT48H16M16LF_2.fm - Rev F 4/07 EN

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Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2006 Micron Technology, Inc. All rights reserved.

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