MT9171 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
부품명
상세내역
제조사
MT9171 Datasheet PDF : 28 Pages
| |||
MT9171/72
Data Sheet
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
Reg Sel-1 Reg Sel-2
DRR
BRS
DINB
PSEN
ATTACK
TxHK
Default Mode Selection (Refer to Table 4a)
Bit
Name
Description
6
ATTACK2 Convergence Speedup. When set to ’1’, the echo canceller will converge to the reflection
coefficient much faster. Used on power-up for fast convergence.1 When ’0’, the echo
canceller will require the normal amount of time to converge to a reflection coefficient.
7
TxHK2 Transmit Housekeeping. When set to ’0’, logic zero is transmitted over the line as
Housekeeping Bit. When set to ’1’, logic one is transmitted over the line as
Housekeeping Bit.
Table 4 - Control Register
Notes:
1. Suggested use of ATTACK:
-At 160 kbit/s full convergence requires 850 ms with ATTACK held high for the first 240 frames or 30 ms.
-At 80 kbit/s full convergence requires 1.75 s with ATTACK held high for the first 480 frames or 60 ms.
2. When bits 4-7 of the Control Register are all set to one, the DNIC operates in one of the default modes as defined in Table 4a,
depending upon the status of bit-3.
C-Channel Internal Control Internal Diagnostic
(Bit 0-7)
Register
Register
Description
XXX01111
00000000
01000000
Default Mode-13: Bit rate is 80 kbit/s. ATTACK,
PSEN, DINB, DRR and all diagnostics are disabled.
TxHK=0.
XXX11111
00010000
01000000
Default Mode-24 Bit rate is 160 kbit/s. ATTACK,
PSEN, DINB, DRR and all diagnostics are disabled.
TxHK=0.
Table 4a - Default Mode Selection
Notes:
3. Default Mode 1 can also be selected by tying CDSTi/CDi pin low when DNIC is operating in dual mode.
4. Default Mode 2 can also be selected by tying CDSTi/CDi pin high when DNIC is operating in dual mode.
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
Reg Sel-1 Reg Sel-2
Loopback
FUN
PSWAP
DLO
Default Mode Selection
(Refer to Table 4a)
Not Used
Bit
Name
Description
0
Reg Sel-1 Register Select-1. Must be set to ’0’ to select the Diagnostic Register.
1
Reg Sel-2 Register Select-2. Must be set to ’1’ to select the Diagnostic Register.
2,3
Loopback
Bit 2 Bit 3
0 0 All loopback testing functions disabled. Normal operation.
0 1 DSTi internally looped back into DSTo for system diagnostics.
1
0
LOUT is internally looped back into LIN for system diagnostics.2
1
1
DSTo is internally looped back into DSTi for end-to-end testing.3
12
Zarlink Semiconductor Inc.
Share Link: 