AMIS-30522(2009) 데이터 시트보기 (PDF) - ON Semiconductor
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AMIS-30522 Datasheet PDF : 29 Pages
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AMIS−30522, NCV70522
tNXT_HI
tNXT_LO
NXT
0.5 VCC
tDIR_SET tDIR_HOLD
ÌÌÌÌÌÌÌÌÌ DIR
VALID
ÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌ
Figure 4. NXT−Input Timing Diagram
Table 7. SPI TIMING PARAMETERS
Symbol
Parameter
tCLK
tCLK_HIGH
tCLK_LOW
tSET_DI
tHOLD_DI
tCSB_HIGH
tSET_CSB
tSET_CLK
SPI Clock Period
SPI Clock High Time
SPI Clock Low Time
DI Setup Time, Valid Data Before Rising Edge of CLK
DI Hold Time, Hold Data After Rising Edge of CLK
CS High Time
CS Setup Time, CS Low Before Rising Edge of CLK
CLK Setup Time, CLK Low Before Rising Edge of CS
Min
Typ
Max Unit
1
ms
100
ns
100
ns
50
ns
50
ns
2.5
ms
100
ns
100
ns
CS
tSET_CSB
0.2 VCC
tCLK
tSET_CLK
0.2 VCC
CLK
0.2 VCC
0.8 VCC
0.2 VCC
tCLK_HI
tCLK_LO
tSET_DI
ÌÌ ÌÌÌÌÌÌÌÌ DI
0.8 VCC
VALID
tHOLD_DI
ÌÌÌÌ ÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌ Figure 5. SPI Timing
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