NJW1167 데이터 시트보기 (PDF) - Japan Radio Corporation
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NJW1167 Datasheet PDF : 25 Pages
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NJW1167/A
s DEFINITION OF I2C REGISTER
♦I2C BUS FORMAT
MSB
LSB
S
Slave Address
A
MSB
LSB
Select Address
MSB
A
Data
LSB
AP
1bit
8bit
1bit
8bit
1bit
8bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
♦SLAVE ADDRESS
R/W : Set the Write Mode or Read Mode.
ADR : Set the Slave Address by “ADR” terminal. (See Application Circuit)
1bit 1bit
Slave Address
Hex
MSB
LSB
-
1
0
0
0
0
x R/W = 0 : Write Mode, ADR = 0/1
0
ADR R/W
-
-
1
0
0
0
0
0
0
0
80(h)
1
0
0
0
0
0
1
0
82(h)
x R/W = 1 : Read Mode, ADR = 0/1
-
1
0
0
0
0
0
0
1
81(h)
1
0
0
0
0
0
1
1
83(h)
♦CONTROL REGISTER TABLE
The select address sets each function (Volume, Balance, Bass Boost Select, AGC, Surround, Tone Control, AUX).
The auto increment function cycles the select address as follows.
00H¡01H¡02H¡03H¡04H¡05H¡00H
<Write Mode>
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
01H
CHS
02H
03H
BCB
04H
BCT
VOL
BAL
TRIM
BASS
TREB
BBSW
✴
✴
✴
05H
<Read Mode>
SUR
AUX1
AUX0
AGCL
AGC
✴ : Don’t Care
BIT
D7
D6
D5
D4
D3
D2
D1
D0
1
1
1
1
1
1
PORT1
PORT0
•PORT1, PORT0 terminal setting
D1/D0
Remarks
0
D1/D0 output “0” at PORT1/PORT0 terminal receive High signal “1” (more than 3.5V)
1
D1/D0 output “1” at PORT1/PORT0 terminal receive Low signal “0” (less than 1.0V)
♦CONTROL REGISTER DEFAULT VALUE
Control register default value is all “0”.
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
0
0
0
0
0
0
0
0
01H
0
0
0
0
0
0
0
0
02H
0
0
0
0
0
0
0
0
03H
0
0
0
0
0
0
0
0
04H
0
0
0
0
0
0
0
0
05H
0
0
0
0
0
0
0
0
-14-
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