NT7502
3. Set Page Address
Specifies page address to load display RAM data to page address register. Any RAM data bit can be accessed when its page
address and column address are specified. The display remains unchanged even when the page address is changed. Page
address 8 is the display RAM area dedicated to the indicator, and only D0 is valid for data change.
A0 E R / W D7 D6 D5 D4 D3 D2 D1 D0
RD WR
0 1 0 1 0 1 1 A3 A2 A1 A0
A3 A2 A1 A0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
Page address
0
1
2
3
4
5
6
7
8
4. Set Column Address
Specifies column address of display RAM. Divide the column address into 4 higher bits and 4 lower bits. Set each of them
succession. When the microprocessor repeats to access the display RAM, the column address counter is incremental by
during each access until address 132 is accessed. The page address is not changed during this time.
A0 E R / W D7 D6 D5 D4 D3 D2 D1 D0
RD WR
Higher bits 0 1 0 0 0 0 1 A7 A6 A5 A4
Lower bits 0 1 0 0 0 0 0 A3 A2 A1 A0
A7 A6 A5 A4 A3 A2 A1 A0 Line address
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
:
:
1
0
0
0
0
0
1
1
131
24