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NT7502 데이터 시트보기 (PDF) - Novatek Microelectronics

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NT7502
Novatek
Novatek Microelectronics Novatek
NT7502 Datasheet PDF : 54 Pages
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NT7502
Sleep Mode
This mode stops every operation of the LCD display system, and can reduce current consumption nearly to a static current
value if no access is made from the microprocessor. The internal status in the sleep mode is as follows:
(1) Stops the oscillator circuit and LCD power supply circuit.
(2) Stops the LCD drive, and outputs the VSS level as the segment/common driver output.
(3) Holds the display data and operation mode provided before the start of the sleep mode.
(4) The MPU can access the built-in display RAM.
Standby Mode
Stops the operation of the duty LCD display system and only turns on the static drive system to reduce current consumption
to the minimum level required for static drive.
The ON operation of the static drive system indicates that the NT7502 is in standby mode. The internal status in the standby
mode is as follows:
(1) Stops the LCD power supply circuit.
(2) Stops the LCD drive and outputs the VSS level as the segment / common driver output. However, the static drive system
still operates.
(3) Holds the display data and operation mode provided before the start of the standby mode.
(4) The MPU can access the built-in display RAM.
When the RESET command is issued in the standby mode, the sleep mode is set.
# When the LCD drive voltage level is given by an external resistive driver, the current of this resistor must be cut so that
it may be fixed to floating or VSS level, prior to or concurrently with the situation of causing the NT7502 to enter sleep
mode or standby mode.
# When an external power supply is used, likewise, the function of this external power supply must be stopped so that it
may be fixed to floating or VSS level, prior to or concurrently with the situation of causing the NT7502 to enter sleep
mode or standby mode.
21. NOP
Non-Operation Command
A0 E R / W D7 D6 D5 D4 D3 D2 D1 D0
RD WR
01 0 11100011
22. Test Command
This is the dedicated IC chip test command. It must not be used for normal operation. If the Test command is issued
inadvertently, set the RES input to low or issue the Reset command to release the test mode.
A0 E R / W D7 D6 D5 D4 D3 D2 D1 D0
RD WR
01 0 1111* * * *
*: Invalid bit
Cautions: The NT7502 maintains an operation status specified by each command. However, the internal operation status
may be changed by a high level of ambient noise. Users must consider how to suppress noise on the package
and system or to prevent ambient noise insertion. To prevent a spike in noise, built-in software for periodical
status refreshment is recommended.
The test command can be inserted in an unexpected place. Therefore it is recommended to enter the test mode
reset command F0h during the refresh sequence.
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