P89LPC970 데이터 시트보기 (PDF) - NXP Semiconductors.

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P89LPC970

8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash

NXP Semiconductors. 

NXP Semiconductors

4. Block diagram

P89LPC970/971/972

8-bit microcontroller with accelerated two-clock 80C51 core

P89LPC970/971/972

ACCELERATED 2-CLOCK 80C51 CPU

P3[1:0]

P1[7:0]

P0[7:0]

CRYSTAL

OR

RESONATOR

XTAL1

XTAL2

2 kB/4 kB/8 kB

CODE FLASH

256-BYTE

DATA RAM

internal bus

PORT 3

CONFIGURABLE I/Os

PORT 1

CONFIGURABLE I/Os

PORT 0

CONFIGURABLE I/Os

KEYPAD

INTERRUPT

WATCHDOG TIMER

AND OSCILLATOR

PROGRAMMABLE

OSCILLATOR DIVIDER

CPU

clock

CONFIGURABLE

OSCILLATOR

ON-CHIP RC

OSCILLATOR

WITH CLOCK

DOUBLER

(1) For pin remap

Fig 1. Block diagram

UART

I2C-BUS

SPI

REAL-TIME CLOCK/

SYSTEM TIMER

TIMER 0

TIMER 1

TIMER 2

TIMER 3

TIMER 4

ANALOG

COMPARATORS

TXD

RXD

SCL

SDA

SPICLK(1)

MOSI(1)

MISO(1)

SS(1)

T0

T1

T2

T2EX

T3

T3EX

T4

T4EX

CMP2

CIN2B

CIN2A

CMP1

CIN1A

CIN1B

POWER MANAGEMENT

(POWER-ON RESET,

BROWNOUT RESET,

REGULATORS)

002aae550

P89LPC97X

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 8 June 2010

© NXP B.V. 2010. All rights reserved.

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