PM3350 데이터 시트보기 (PDF) - PMC-Sierra

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PM3350

8 PORT ETHERNET SWITCH

PMC-Sierra 

ELAN 8X10

DATA SHEET

PMC-970109

ISSUE 3

PM3350 ELAN 8 X10

8 PORT ETHERNET SWITCH

PRIMARY FEATURES AND BENEFITS

Wire-speed Packet switching

Each ELAN 8x10 chip offers 8 separate Ethernet ports all capable of accepting and

processing packets simultaneously at wire rates (ranging from 14,880 packets/sec per

port with a packet length of 64 bytes to 813 packets/sec per port with 1518 byte

packets), immediately multiplying the aggregate bandwidth of the target network by a

factor of eight. In addition, the low cost and compact size permitted by the single-chip

ELAN 8x10 solution makes micro-segmentation highly feasible, allowing even more

improvement in bandwidth.

Combined Input- and Output-buffered switch

The ELAN 8x10 implements a hybrid input-buffered/output-queued switching algorithm

which minimizes packet loss, allows packet buffers to be allocated on a demand basis,

and permits limits to be established to prevent any one port from consuming all system

buffer memory. Buffer limits are configured on a per-port basis. Packet storage is

allocated within the external memory by the ELAN 8x10 from a central pool using an

on-demand method, employing linked lists of small, fixed-length buffers to hold variable

sized packets in order to maximize memory utilization.

Modular design

Multiple ELAN 8x10 chips interconnect seamlessly, allowing transparent expansion of

switching hubs from 8 to 64 ports without significant redesign. The 1 Gbit/s expansion

port bandwidth ensures that network capacity grows linearly as more ELAN 8x10 chips

are added (up to the maximum number of supported ports).

Advanced switching features

The ELAN 8x10 directly implements backpressure flow control (as a user-selectable

option), with configurable thresholds and limits, to minimize packet loss in heavily

loaded networks. Backpressure is performed by jamming, or colliding with, incoming

packets on an individual port when the port has run out of buffer space; all other ports

continue to run normally, with no head-of-line blocking effects. The ELAN 8x10 also

implements per-packet lifetime control to ensure that transmit queues are flushed

properly in the event of bottlenecks at the output ports. Address aging is handled on-

chip, as is purging of the address table in the event of a network reconfiguration.

Broadcast storm rate limiting is implemented (with configurable rate limits) to reduce the

effects of high broadcast rates on the traffic flowing through the switch.

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY

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