HTG2150(2000) 데이터 시트보기 (PDF) - Holtek Semiconductor
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HTG2150 Datasheet PDF : 49 Pages
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Preliminary
HTG2150
gram is in the program will always jump to the
appropriate interrupt service address in Bank
0. The original full 14 bit address will be stored
on the stack and restored when the relevant
RET/RETI instruction is executed, automati-
cally returning the program to the original
ROM bank. This eliminates the need for pro-
grammers to manage the BP when interrupts
occur.
Certain locations in Bank 0 of program memory
are reserved for special usage:
· ROM Bank 0 (BP5~BP7=000B)
The ROM bank 0 ranges from 0000H to
1FFFH.
· Location 000H
This area is reserved for the initialization
program. After chip reset, the program al-
ways begins execution at location 000H.
· Location 004H
This area is reserved for the external inter-
rupt service program. If the INT input pin is
activated, and the interrupt is enabled and
the stack is not full, the program begins exe-
cution at location 004H.
· Location 008H
This area is reserved for the timer counter 0 in-
terrupt service program. If a timer interrupt re-
sults from a timer counter 0 overflow, and if the
interrupt is enabled and the stack is not full,
the program begins execution at location 008H.
0000H
0004H
0008H
000C H
010H
014H
018H
D e v ic e in itia liz a tio n p r o g r a m
E x te r n a l in te r r u p t s u b r o u tin e
T im e r c o u n te r 0 in te r r u p t s u b r o u tin e
U nused
T im e r 2 in te r r u p t s u b r o u tin e
T im e r 3 in te r r u p t s u b r o u tin e
D /A b u ffe r e m p ty in te r r u p t
P ro g ra m
ROM
3FFFH
1 6 b its
Program memory
Mode
Initial reset
External interrupt
Timer counter 0 overflow
Timer 2 overflow
Timer 3 overflow
D/A buffer empty interrupt
Skip
Loading PCL
Jump, call branch
Return from subroutine
Program Rom Address
*13 *12 *11 *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0
0 0 0 000 0 0 0 0 0 0 0 0
0 0 0 000 0 0 0 0 0 1 0 0
0 0 0 000 0 0 0 0 1 0 0 0
0 0 0 000 0 0 0 1 0 0 0 0
0 0 0 000 0 0 0 1 0 1 0 0
0 0 0 000 0 0 0 1 1 0 0 0
PC+2
*13 *12 *11 *10 *9 *8 @7 @6 @5 @4 @3 @2 @1 @0
BP.5 #12 #11 #10 #9 #8 #7 #6 #5 #4 #3 #2 #1 #0
S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0
Program rom address
Note: *13~*0: Program ROM address
@7~@0: PCL bits
#12~#0: Instruction code bits
S13~S0: Stack register bits
BP.5: Bit 5 of bank pointer (04H)
8
July 24, 2000
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