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9538 Datasheet PDF : 28 Pages
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NXP Semiconductors
PCA9538
8-bit I2C-bus and SMBus low power I/O port with interrupt and reset
10. Dynamic characteristics
Table 10. Dynamic characteristics
Symbol Parameter
fSCL
SCL clock frequency
tBUF
bus free time between a STOP and
START condition
tHD;STA
tSU;STA
hold time (repeated) START condition
set-up time for a repeated START
condition
tSU;STO
tHD;DAT
tVD;ACK
tVD;DAT
tSU;DAT
tLOW
tHIGH
tr
tf
tSP
set-up time for STOP condition
data hold time
data valid acknowledge time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL clock
rise time of both SDA and SCL signals
fall time of both SDA and SCL signals
pulse width of spikes that must be
suppressed by the input filter
Port timing
tv(Q)
data output valid time
tsu(D)
data input set-up time
th(D)
data input hold time
Interrupt timing
tv(INT)
trst(INT)
RESET
valid time on pin INT
reset time on pin INT
tw(rst)
trec(rst)
trst
reset pulse width
reset recovery time
reset time
Conditions
Standard-mode
I2C-bus
Min
Max
0
100
4.7
-
Fast-mode I2C-bus Unit
Min
Max
0
400 kHz
1.3
- µs
4.0
-
4.7
-
0.6
- µs
0.6
- µs
4.0
0
[1] 0.3
[2] 300
250
4.7
4.0
-
-
-
-
0.6
- µs
-
0
- ns
3.45
0.1
0.9 µs
-
50
- ns
-
100
- ns
-
1.3
- µs
-
0.6
- µs
1000 20 + 0.1Cb[3] 300 ns
300 20 + 0.1Cb[3] 300 ns
50
-
50 ns
-
200
-
200 ns
100
-
100
- ns
1
-
1
- µs
-
4
-
4 µs
-
4
-
4 µs
4
-
4
- ns
0
-
0
- ns
400
-
400
- ns
[1] tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
[2] tVD;DAT = minimum time for the SDA data out to be valid following SCL LOW.
[3] Cb = total capacitance of one bus line in pF.
PCA9538_5
Product data sheet
Rev. 05 — 28 May 2009
© NXP B.V. 2009. All rights reserved.
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